Program interruption filtering in transactional execution

US10437602B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10437602-B2
Application numberUS-201213524839-A
CountryUS
Kind codeB2
Filing dateJun 15, 2012
Priority dateJun 15, 2012
Publication dateOct 8, 2019
Grant dateOct 8, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Program exception conditions cause a transaction to abort and typically result in an interruption in which the operating system obtains control. A program interruption filtering control is provided to selectively present the interrupt. That is, the interrupt from the program exception condition may or may not be presented depending at least on the program interruption filtering control and a transaction class associated with the program exception condition. The program interruption filtering control is provided by a TRANSACTION BEGIN instruction.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product for managing interruptions in a computing environment, the computer program product comprising: a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: performing transactional processing of a transaction, the transaction effectively delaying committing transactional stores to main memory until completion of a selected transaction, the transactional processing having a filtering control associated therewith; detecting, by a processor, during transactional processing, a program exception condition, the program exception condition being defined for presenting an interrupt and being one program exception condition of a plurality of program exception conditions available to be detected during the transactional processing, the plurality of program exception conditions having transaction classes associated therewith, and wherein the program exception condition being detected has associated therewith a particular transaction class of the transaction classes; determining, based on detecting the program exception condition, whether an interrupt is to be presented for that program exception condition detected during the transactional processing, wherein the determining employs the particular transaction class associated with the program exception condition being detected and the filtering control associated with the transactional processing to determine whether the interrupt is to be presented for that program exception condition; and based on the determining indicating the interrupt is not to be presented, bypassing presentation of the interrupt. 2. The computer program product of claim 1 , wherein the filtering control is set to one value of a plurality of values, the plurality of values indicating a plurality of levels of interrupt filtering. 3. The computer program product of claim 2 , wherein a first level of the plurality of levels indicates no filtering in which program exception conditions result in an interrupt, a second level indicates limited filtering in which program exception conditions of a selected transaction class do not result in an interrupt, and a third level indicates moderate filtering in which program exception conditions of a plurality of selected transaction classes do not result in an interrupt. 4. The computer program product of claim 3 , wherein for the second level, program exception conditions having a transaction class value of three do not result in an interrupt, and for the third level, program exception conditions having a transaction class value of two or three do not result in an interrupt. 5. The computer program product of claim 3 , wherein the one value in which the filtering control is set indicates a filtering level of the plurality of levels, and wherein the determining comprises: determining the particular transaction class for the program exception condition; and checking for the filtering level whether the particular transaction class results in an interrupt, wherein the determining indicates the interrupt is not to be presented based on the checking indicating the particular transaction class for that filtering level does not result in an interrupt. 6. The computer program product of claim 1 , wherein the filtering control is included in a transaction begin instruction, the transaction begin instruction being one transaction begin instruction of a plurality of transaction begin instructions used to create a nest of transactions, and wherein one or more of the transaction begin instructions include a filtering control, and wherein the filtering control employed is a highest value of the one or more filtering controls. 7. The computer program product of claim 1 , wherein the transaction is a constrained transaction and the filtering control is set to a default value. 8. The computer program product of claim 1 , wherein based on the determining indicating the interrupt is to be presented, the method further comprises: storing contents in one or more memory locations assigned to the program exception condition, wherein the storing comprises setting an instruction length code of a program interruption identification respective to an instruction at which the program exception condition occurred; and storing a transaction abort program status word as a program old program status word. 9. The computer program product of claim 1 , wherein the method further comprises aborting a transaction based on detecting the program exception condition, the transaction being a nonconstrained transaction and the filtering control indicating the interruption is to be bypassed. 10. A computer system for managing interruptions in a computing environment, the computer system comprising: a memory; and a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising: performing transactional processing of a transaction, the transaction effectively delaying committing transactional stores to main memory until completion of a selected transaction, the transactional processing having a filtering control associated therewith; detecting, by a processor, during transactional processing, a program exception condition, the program exception condition being defined for presenting an interrupt and being one program exception condition of a plurality of program exception conditions available to be detected during the transactional processing, the plurality of program exception conditions having transaction classes associated therewith, and wherein the program exception condition being detected has associated therewith a particular transaction class of the transaction classes; determining, based on detecting the program exception condition, whether an interrupt is to be presented for that program exception condition detected during the transactional processing, wherein the determining employs the particular transaction class associated with the program exception condition being detected and the filtering control associated with the transactional processing to determine whether the interrupt is to be presented for that program exception condition; and based on the determining indicating the interrupt is not to be presented, bypassing presentation of the interrupt. 11. The computer system of claim 10 , wherein the filtering control is set to one value of a plurality of values, the plurality of values indicating a plurality of levels of interrupt filtering. 12. The computer system of claim 11 , wherein a first level of the plurality of levels indicates no filtering in which program exception conditions result in an interrupt, a second level indicates limited filtering in which program exception conditions of a selected transaction class do not result in an interrupt, and a third level indicates moderate filtering in which program exception conditions of a plurality of selected transaction classes do not result in an interrupt. 13. The computer system of claim 12 , wherein for the second level, program exception conditions having a transaction class value of three do not result in an interrupt, and for the third level, program exception conditions having a transaction class value of two or three do not result in an interrupt. 14. The computer system of claim 12 , wherein the one value in which the filtering control is set indicates a filtering level of the plurality of levels, and wherein the determining comprises: determining the particular transaction class for the program exception condition; and checking fo

Assignees

Inventors

Classifications

  • Transaction processing · CPC title

  • Arrangements for executing specific programs · CPC title

  • Interprogram communication · CPC title

  • G06F9/3865Primary

    using deferred exception handling, e.g. exception flags · CPC title

  • Synchronisation or serialisation instructions · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10437602B2 cover?
Program exception conditions cause a transaction to abort and typically result in an interruption in which the operating system obtains control. A program interruption filtering control is provided to selectively present the interrupt. That is, the interrupt from the program exception condition may or may not be presented depending at least on the program interruption filtering control and a tr…
Who is the assignee on this patent?
Greiner Dan F, Jacobi Christian, Mitran Marcel, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F9/3865. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 08 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).