Manufacturing method for a nanostructured device using a shadow mask

US10403809B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10403809-B2
Application numberUS-201716078837-A
CountryUS
Kind codeB2
Filing dateMar 7, 2017
Priority dateMar 7, 2016
Publication dateSep 3, 2019
Grant dateSep 3, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present disclosure relates to a device and method for forming efficient quantum devices, in particular quantum devices that have not been contaminated in ex-situ processes. In particular the presently disclosed method can be applied for manufacturing of a Josephson junction which is an element in a tunable superconducting qubit. One embodiment relates to a method for in-situ production of a barrier/gap in the surface layer(s) of an elongated nanostructure, the method comprising the steps of providing at least one elongated device nanostructure on a substrate in a vacuum chamber having at least one deposition source, providing at least one elongated shadow nanostructure in said vacuum chamber, and depositing at least a first facet layer on at least a part of the device nanostructure(s) and the shadow nanostructure(s) by means of said deposition source, wherein the deposition source, the device nanostructure and the shadow nanostructure during deposition are arranged such that the shadow nanostructure covers and forms a shadow mask on at least a part of the device nanostructure thereby forming a gap in the first facet layer deposited on the device nanostructure.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for in-situ production of a gap in the surface layer(s) of an elongated nanostructure, the method comprising the steps of growing at least two elongated nanostructures from a surface of a substrate such that at least some of the at least two nanostructures grow in non-parallel directions, at least some of the at least two nanostructures being shadow nanostructures and at least some of the at least two nanostructures being device nanostructures, the substrate being located in a vacuum chamber having at least one deposition source, and depositing at least a first facet layer on at least a part of each of the at least two nanostructures by means of said deposition source, wherein the deposition source and the growth of the at least two nanostructures are arranged such that, during deposition of said at least first facet layer, at least one shadow nanostructure covers and forms a respective shadow mask over a portion of a respective at least one device nanostructure, thereby preventing deposition of the at least first facet layer on the portion of the respective at least one device nanostructure, and thereby collectively forming a respective gap in the first facet layer deposited on each device nanostructure. 2. The method according to claim 1 , wherein each of the at least two nanostructures comprises an elongated crystalline semiconductor nanostructure, comprising a plurality of substantially plane side facets, and wherein the at least first facet layer comprises a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets. 3. The method according to claim 1 , wherein the device nanostructures and the shadow nanostructures are arranged such that each respective shadow mask formed over the portion of the respective at least one device nanostructure during deposition substantially corresponds to the width of the respective shadow nanostructure. 4. The method according to claim 1 , wherein the device nanostructures and the shadow nanostructures are provided by means of growing said at least two nanostructures simultaneously from said substrate. 5. The method according to claim 1 , wherein respective growth positions of the at least two nanostructures on the substrate are determined by means of at least one catalyst pattern. 6. The method according to claim 5 , wherein catalyst particles define said at least one catalyst pattern, the at least one catalyst pattern comprises a device nanostructure pattern and a shadow nanostructure pattern, and wherein the catalyst particles that define the shadow nanostructure pattern are different in size from the catalyst particles that define the device nanostructure pattern. 7. The method according to claim 1 , wherein the at least one deposition source comprises a vapor deposition source, and wherein the vacuum chamber and the at least one deposition source are configured to provide a directional beam flux from the at least one deposition source during deposition. 8. The method according to claim 1 , wherein the device nanostructures and the shadow nanostructures are grown, at least initially, in parallel directions from the same substrate. 9. The method according to claim 1 , further comprising the step of kinking the growth direction of the device nanostructures during growth of the device nanostructures and/or kinking the growth direction of the shadow nanostructures during growth of the shadow nanostructures. 10. The method according to claim 1 , further comprising the step of forming an interconnected network of at least some of the device nanostructures. 11. The method according to claim 1 , wherein the device nanostructures and the shadow nanostructures are grown from the same plane crystalline surface. 12. The method according to claim 1 , wherein at least a part of the at least two nanostructures are grown from a first surface of the substrate which is non-parallel and adjacent to a second surface of the substrate from where another part of the at least two nanostructures are grown, the first and second surfaces arranged such that during growth at least one nanostructure grown perpendicular from the first or second surface forms a shadow mask on at least one device nanostructure grown perpendicular from the other surface. 13. The method according to claim 1 , wherein at least some of the at least two nanostructures are grown from a crystalline first surface of the substrate and wherein at least a some other of the at least two nanostructures are grown from a crystalline second surface of the substrate, and wherein the crystalline orientation of the first surface is different from the crystalline orientation of the second surface, such that corresponding nanostructures grow in non-parallel directions from said first and second surfaces, respectively. 14. The method according to claim 1 , wherein the at least two nanostructures are primarily grown in two non-parallel directions from the same plane crystalline surface, said two nonparallel directions being defined by the crystalline orientations of the substrate and the nanostructures. 15. A nanoscale device comprising a tunnel barrier/Josephson junction formed by the method according to claim 1 . 16. The method according to claim 12 , wherein the first surface and/or the second surface of the substrate corresponds to a sidewall of a crystalline ridge deposited on the substrate. 17. The method according to claim 2 , wherein each elongated crystalline semiconductor nanostructure comprises a nanowire or a nanowhisker or a nanorod. 18. The method according to claim 5 , wherein said at least one catalyst pattern is defined on the surface of the substrate by means of lithography. 19. The method according to claim 5 , wherein said at least one catalyst pattern comprises a device nanostructure pattern and a shadow nanostructure pattern. 20. The method according to claim 10 , wherein the interconnected network is formed by kinking the growth direction of the at least some of the device nanostructures during growth of said device nanostructures. 21. A method for in-situ production of a gap in the surface layer(s) of an elongated nanostructure, the method comprising the steps of providing at least one elongated device nanostructure on a substrate in a vacuum chamber having at least one deposition source, providing at least one elongated shadow nanostructure in said vacuum chamber, and depositing at least a first facet layer on at least a part of each device nanostructure and at least a part of each shadow nanostructure by means of said deposition source, wherein the deposition source, the at least one elongated device nanostructure and the at least one elongated shadow nanostructure during deposition are arranged such that the each shadow nanostructure covers and forms a shadow mask over a portion of a respective at least one of the device nanostructures thereby preventing deposition of the at least first facet layer on the portion of the respective at least one device nanostructure, and thereby collectively forming a gap in the first facet layer deposited on each device nanostructure.

Assignees

Inventors

Classifications

  • Vaporous components, e.g. vapour-liquid-solid-growth · CPC title

  • Manufacture or treatment of nanostructures · CPC title

  • Whiskers or needles · CPC title

  • by wave energy or particle radiation (C23C14/32 - C23C14/48 take precedence) · CPC title

  • Epitaxial-layer growth · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10403809B2 cover?
The present disclosure relates to a device and method for forming efficient quantum devices, in particular quantum devices that have not been contaminated in ex-situ processes. In particular the presently disclosed method can be applied for manufacturing of a Josephson junction which is an element in a tunable superconducting qubit. One embodiment relates to a method for in-situ production of a…
Who is the assignee on this patent?
Univ Copenhagen
What technology area does this patent fall under?
Primary CPC classification C23C14/042. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Sep 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).