Semiconductor devices including conductive lines and methods of forming the semiconductor devices

US10388601B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10388601-B2
Application numberUS-201715842432-A
CountryUS
Kind codeB2
Filing dateDec 14, 2017
Priority dateAug 28, 2015
Publication dateAug 20, 2019
Grant dateAug 20, 2019

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device including conductive lines is disclosed. First conductive lines each comprise a first portion, a second portion, and an enlarged portion, the enlarged portion connecting the first portion and the second portion of the first conductive line. The semiconductor device includes second conductive lines, at least some of the second conductive lines disposed between a pair of the first conductive lines, each second conductive line including a larger cross-sectional area at an end portion of the second conductive line than at other portions thereof. The semiconductor device includes a pad on each of the first conductive lines and the second conductive lines, wherein the pad on each of the second conductive lines is on the end portion thereof and the pad on each of the first conductive lines is on the enlarged portion thereof.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a first group of conductive lines extending in a first direction, each conductive line of the first group of conductive lines comprising a conductive contact on an enlarged portion of the respective conductive line at an end portion thereof; and a second group of conductive lines extending in the first direction and comprising a conductive contact comprising an enlarged portion and located between end portions thereof, each conductive line of the second group of conductive lines located adjacent to at least one conductive line of the first group of conductive lines, at least one conductive line of the second group of conductive lines comprising a first portion connected to a second portion by its respective enlarged portion, a longitudinal axis of the first portion offset from a longitudinal axis of the second portion. 2. The semiconductor device of claim 1 , wherein about one-half of the conductive contacts of the first group of conductive lines are located at a first end of the conductive lines of the first group of conductive lines and about one-half of the conductive contacts of the first group of conductive lines are located at a second end of the conductive lines of the first group of conductive lines. 3. The semiconductor device of claim 1 , wherein the conductive contacts of the second group of conductive lines are laterally displaced from each other. 4. The semiconductor device of claim 1 , wherein each of the conductive contacts of the first group of conductive lines are laterally displaced from each other. 5. The semiconductor device of claim 1 , wherein the conductive lines of the first group of conductive lines each comprise a narrow region proximate the enlarged portion of an adjacent conductive line of the second group of conductive lines. 6. The semiconductor device of claim 1 , wherein the enlarged portion of each conductive line of the second group of conductive lines extends at an angle between about 10° and about 30° relative to a longitudinal axis of the respective conductive line. 7. The semiconductor device of claim 1 , wherein the enlarged portions of the second group of conductive lines are located in an array region of the semiconductor device and the enlarged portions of the first group of conductive lines are located in a peripheral region of the semiconductor device. 8. The semiconductor device of claim 1 , wherein the conductive contacts of the first group of conductive lines are laterally and longitudinally offset from each other. 9. The semiconductor device of claim 1 , further comprising a third group of conductive lines extending in a second direction substantially perpendicular to the first direction and comprising conductive contacts different from the conductive contacts of the first group of conductive lines and the second group of conductive lines. 10. The semiconductor device of claim 9 , wherein the third group of conductive lines includes a first portion of conductive lines having conductive contacts at end portions thereof and a second portion of conductive lines having conductive contacts between end portions thereof. 11. The semiconductor device of claim 1 , wherein the enlarged portion of the second group of conductive lines each comprise an arcuate surface. 12. A method of forming a semiconductor device, the method comprising: forming a first group of conductive lines extending in a first direction; forming a conductive contact on each conductive line of the first group of conductive lines on an enlarged portion of the respective conductive line at an end portion thereof; forming a second group of conductive lines extending in the first direction, forming the second group of conductive lines comprising forming each conductive line of the second group of conductive lines to be located adjacent to at least one conductive line of the first group of conductive lines; and forming a conductive contact on each conductive line of the second group of conductive lines on an enlarged portion of the respective conductive line and between end portions thereof at least one conductive line of the second group of conductive lines comprising a first portion connected to a second portion by the enlarged portion of the respective conductive line, a longitudinal axis of the first portion offset from a longitudinal axis of the second portion. 13. The method of claim 12 , wherein forming a second group of conductive lines extending in the first direction comprises forming about the same number of second conductive lines as a number of the first conductive lines. 14. The method of claim 12 , wherein forming a conductive contact on each conductive line of the first group of conductive lines on an enlarged portion of the respective conductive line at an end portion thereof comprises forming about one-half of the conductive contacts of the first group of conductive lines at a first end of each of the conductive lines and forming about one-half of the conductive contacts of the first group of conductive lines at a second, opposite end of each of the conductive lines. 15. The method of claim 14 , wherein forming about one-half of the conductive contacts of the first group of conductive lines at a first end of the conductive lines comprises forming the conductive contacts of the first group of conductive lines at the first end of the conductive lines to be laterally and longitudinally offset from at least one other of the conductive contacts of the first group of conductive lines at the first end. 16. The semiconductor device of claim 1 , wherein the end portion of at least some conductive lines of the first group of conductive lines extends further than the end portion of at least other conductive lines of the first group of conductive lines. 17. The semiconductor device of claim 1 , wherein the conductive contact of at least some of the conductive lines of the second group of conductive lines is located proximate a longitudinally central portion of the respective conductive line. 18. The semiconductor device of claim 1 , wherein at least some conductive contacts of the conductive lines of the first group of conductive lines are not longitudinally offset from each other.

Assignees

Inventors

Classifications

  • using subtractive patterning of the conductive members · CPC title

  • Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title

  • Interconnections for measuring or testing, e.g. probe pads · CPC title

  • Structural arrangements therefor · CPC title

  • characterised by the processes involved to create the masks · CPC title

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What does patent US10388601B2 cover?
A semiconductor device including conductive lines is disclosed. First conductive lines each comprise a first portion, a second portion, and an enlarged portion, the enlarged portion connecting the first portion and the second portion of the first conductive line. The semiconductor device includes second conductive lines, at least some of the second conductive lines disposed between a pair of th…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/031. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 20 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).