Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit
US-9507716-B2 · Nov 29, 2016 · US
US10360158B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10360158-B2 |
| Application number | US-201715616917-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 7, 2017 |
| Priority date | Mar 27, 2017 |
| Publication date | Jul 23, 2019 |
| Grant date | Jul 23, 2019 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Embodiments of the present system and method provide cache replacement in a victim exclusive cache using a snoop filter where replacement information is not lost during a re-reference back to the CPU. Replacement information is stored in a snoop filter, meaning that historical access data may be fully preserved and allows for more flexibility in the LLC re-insertion points, without additional bits stored in a L2 cache. The present system and method further include snoop filter replacement technique. The present system and method passes replacement information between a snoop filter and a victim exclusive cache (e.g., LLC) when transactions move cachelines to and from a master CPU. This maintains and advances existing replacement information for a cacheline that is removed from the victim exclusive cache on a read, as well as intelligently replaces and ages cachelines in the snoop filter.
Opening claim text (preview).
What is claimed is: 1. A shared replacement policy computer cache system, comprising: a master processor; a victim exclusive last level cache (LLC) communicatively coupled to the master processor; a snoop filter communicatively coupled to the victim exclusive LLC and to the master processor, wherein the snoop filter is configured to store replacement information, wherein the replacement information includes metadata of stored state and replacement order; a replacement state machine configured to manage replacement operations between the victim exclusive LLC and the snoop filter with the stored replacement information, wherein in response to a read operation from the master processor, the victim exclusive LLC is configured to pass the replacement information to the snoop filter, to remove a cacheline, and to pass the cacheline to the master processor; wherein in response to the read operation from the master processor, the victim exclusive LLC is configured to pass a tag to the snoop filter, wherein the snoop filter is configured to receive the replacement information and the tag instead of the cacheline itself; wherein in response to a write operation from the master processor, the snoop filter is configured to pass the tag and the replacement information to the victim exclusive LLC; wherein the replacement state machine is configured to select an entry in the victim exclusive LLC to victimize, to cause the selected entry to be victimized out of the victim exclusive LLC, to cause the victim exclusive LLC to store the replacement information and the tag in the entry in the victim exclusive LLC, and to allocate a new cacheline in the entry in the victim exclusive LLC; wherein the victim exclusive LLC is a pseudo exclusive LLC; and wherein reads from the snoop filter to an MRU entry in the pseudo exclusive LLC are inclusive to a plurality of processors including the master processor. 2. The shared replacement policy computer cache system of claim 1 , wherein the replacement state machine is configured to manage the replacement operations dependent on the replacement information stored in the snoop filter. 3. The shared replacement policy computer cache system of claim 1 , wherein the replacement state machine is configured to select an entry in the snoop filter to victimize, to cause the selected entry to be victimized out of the snoop filter, and to cause the snoop filter to store the replacement information and the tag in the entry. 4. The shared replacement policy computer cache system of claim 3 , wherein: the selected entry includes a tracking cacheline; the replacement state machine is configured to victimize the tracking cacheline; the master processor is configured to probe the victimized cacheline; and the replacement state machine is configured to cause the tracking cacheline to be allocated into the victim exclusive LLC. 5. The shared replacement policy computer cache system of claim 1 , wherein the replacement state machine is configured to promote any reads from the victim exclusive LLC to a most recently used (MRU) entry in the snoop filter. 6. The shared replacement policy computer cache system of claim 1 , wherein the reads from the victim exclusive LLC to the MRU entry in the snoop filter are exclusive to the master processor.
Employing cache memory using specific memory technology · CPC title
Data transfer between cache memory and other subsystems, e.g. storage devices or host systems · CPC title
with a shared cache · CPC title
with cache invalidating means (G06F12/0815 takes precedence) · CPC title
Coherency control relating to peripheral accessing, e.g. from DMA or I/O device · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.