Image sensor having an interconnection covering a black pixel region surrounding an active pixel region

US10347672B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10347672-B2
Application numberUS-201715653537-A
CountryUS
Kind codeB2
Filing dateJul 19, 2017
Priority dateDec 30, 2016
Publication dateJul 9, 2019
Grant dateJul 9, 2019

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Abstract

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An image sensor of reduced chip size includes a semiconductor substrate having an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed. A plurality of first transparent electrode layers is disposed over the semiconductor substrate, respectively corresponding to the plurality of active pixels. A second transparent electrode layer is integrally formed across the active pixels. An organic photoelectric layer is disposed between the plurality of first transparent electrode layers and the second transparent electrode layer. An interconnection layer is located at a level that is the same as or higher than an upper surface of the pad with respect to an upper main surface of the semiconductor substrate. The interconnection layer extends from the pad to the second transparent electrode layer, and includes a connector electrically connecting the pad and the second transparent electrode layer.

First claim

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What is claimed is: 1. An image sensor comprising: a semiconductor substrate comprising an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed on the semiconductor substrate; a plurality of first transparent electrode layers disposed over the semiconductor substrate and respectively corresponding to the plurality of active pixels; a second transparent electrode layer integrally formed across the plurality of active pixels; an organic photoelectric layer disposed between the plurality of first transparent electrode layers and the second transparent electrode layer; and an interconnection layer located at a level that is the same as or higher than an upper surface of the pad with respect to an upper main surface of the semiconductor substrate, the interconnection layer extending from the pad to the second transparent electrode layer, and comprising a connector electrically connecting the pad and the second transparent electrode layer, wherein the pad is located at a level lower than the plurality of first transparent electrode layers, wherein the semiconductor substrate further comprises a black pixel region that surrounds the active pixel region and in which a plurality of black pixels are disposed, the black pixel region is between the active pixel region and the power delivery region, and wherein the interconnection layer further comprises a cover covering the black pixel region. 2. The image sensor of claim 1 , wherein the second transparent electrode layer comprises an extender extending into the power delivery region toward the pad, the second transparent electrode layer is integrally formed across a part of the power delivery region, the black pixel region, and the active pixel region. 3. The image sensor of claim 2 , wherein the connector extends from the pad to the extender. 4. The image sensor of claim 3 , wherein the extender comprises a first part in contact with the connector and a second part disposed between a part of the second transparent electrode layer disposed in the black pixel region and the first part, the second part is not in contact with the connector, wherein a first extension length of the first part is greater than a second extension length of the second part in a direction from an edge of the black pixel region to the pad. 5. The image sensor of claim 2 , wherein the cover extends from the extender to the black pixel region. 6. The image sensor of claim 1 , wherein the cover has a ring shape extending to surround the active pixel region and covering the plurality of black pixels. 7. The image sensor of claim 1 , wherein the upper surface of the pad is located above the upper main surface of the semiconductor substrate, and wherein the interconnection layer is located above the upper main surface of the semiconductor substrate. 8. The image sensor of claim 1 , wherein the power delivery region is disposed to surround the active pixel region. 9. The image sensor of claim 1 , wherein the pad is a DC pad to which DC power is delivered from outside. 10. An image sensor comprising: a semiconductor substrate comprising an active pixel region in which a plurality of active pixels are disposed, a black pixel region in which a plurality of black pixels are disposed and that surrounds the active pixel region, and a power delivery region in which a plurality of pads including a DC pad are disposed and that surrounds the black pixel region; a plurality of first transparent electrode layers disposed over the semiconductor substrate and respectively corresponding to the plurality of active pixels; a second transparent electrode layer integrally formed across a part of the power delivery region, the black pixel region, and the active pixel region; an organic photoelectric layer disposed between the plurality of first transparent electrode layers and the second transparent electrode layer; and an interconnection layer located at a level higher than an upper main surface of the semiconductor substrate, and extending from the DC pad to the second transparent electrode layer, the interconnection layer comprising a connector electrically connecting the DC pad and the second transparent electrode layer, and a cover covering the black pixel region. 11. The image sensor of claim 10 , wherein upper surfaces of the plurality of pads are lower than lower surfaces of the plurality of first transparent electrode layers with respect to the upper main surface of the semiconductor substrate. 12. The image sensor of claim 11 , wherein the semiconductor substrate comprises a recessed space in the upper main surface of the semiconductor substrate, wherein the plurality of pads are disposed in the recessed space and the upper surfaces of the plurality of pads are located above the upper main surface of the semiconductor substrate. 13. The image sensor of claim 10 , wherein the plurality of pads comprise a plurality of DC pads, and the interconnection layer comprises a plurality of connectors electrically connecting the DC pads and the second transparent electrode layer, wherein at least respective ones of the plurality of connectors are adjacent to each of a plurality of sides forming an outer edge of the black pixel region. 14. The image sensor of claim 10 , wherein the cover comprises an open space corresponding to the active pixel region. 15. An image sensor comprising: a semiconductor substrate comprising an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed; a plurality of first transparent electrode layers disposed over the semiconductor substrate and respectively corresponding to the plurality of active pixels; a second transparent electrode layer integrally formed across the plurality of active pixels; an organic photoelectric layer disposed between the plurality of first transparent electrode layers and the second transparent electrode layer; and an interconnection layer located at a level that is the same as or higher than an upper surface of the pad with respect to an upper main surface of the semiconductor substrate, the interconnection layer extending from the pad to the second transparent electrode layer, and comprising a connector electrically connecting the pad and the second transparent electrode layer, and wherein the semiconductor substrate further comprises a black pixel region that surrounds the active pixel region and in which a plurality of black pixels are disposed, the black pixel region is between the active pixel region and the power delivery region, and wherein the interconnection layer further comprises a cover covering the black pixel region. 16. The image sensor of claim 15 , wherein the second transparent electrode layer comprises an extender extending into the power delivery region toward the pad, the second transparent electrode layer is integrally formed across a part of the power delivery region, the black pixel region, and the active pixel region. 17. The image sensor of claim 16 , wherein the connector extends from the pad to the extender. 18. The image sensor of claim 17 , wherein the extender comprises a first part in contact with the connector and a second part disposed between a part of the second transparent electrode layer disposed in the black pixel region and the first part, the second part is not in contact with the connector, wherein a first extension length of the first part is greater than a second extension length of the second part in a

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What does patent US10347672B2 cover?
An image sensor of reduced chip size includes a semiconductor substrate having an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed. A plurality of first transparent electrode layers is disposed over the semiconductor substrate, respectively corresponding to the plurality of active pixels. A second transparent electrode…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/14609. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 09 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).