Semiconductor device comprising a clamping structure

Patent metadata

Field	Value
Publication number	US-10340264-B2
Application number	US-201815907610-A
Country	US
Kind code	B2
Filing date	Feb 28, 2018
Priority date	Jul 15, 2015
Publication date	Jul 2, 2019
Grant date	Jul 2, 2019

Abstract

Semiconductor device is provided with a semiconductor body that includes a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the first pn junction diode is greater than 100 V, and a breakdown voltage of the second pn junction diode is greater than 10 V.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor body comprising a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact; and
a power transistor including first and second load terminals and a control terminal,
wherein the clamping structure is electrically connected between the control terminal and the second load terminal,
wherein the second load terminal is a drain contact of an insulated gate field effect transistor, a collector contact of an insulated gate bipolar transistor, or a collector contact of a bipolar junction transistor,
wherein the control terminal is a corresponding contact of a gate of the insulated gate field effect transistor, a gate of the insulated gate bipolar transistor, or a base of the bipolar junction transistor,
wherein a breakdown voltage of the first pn junction diode is greater than 100 V,
wherein a breakdown voltage of the second pn junction diode is greater than 10 V.

2. The semiconductor device of claim 1 , wherein the first pn junction diode and the second pn junction diode share at least one semiconductor region of the semiconductor body.

3. The semiconductor device of claim 1 , wherein the power transistor is a discrete power transistor, and wherein the power transistor and the clamping structure are formed in different semiconductor dies.

4. The semiconductor device of claim 3 , wherein the different semiconductor dies are mounted on a common lead frame.

5. The semiconductor device of claim 1 , wherein the clamping structure and the power transistor are included in a single chip package, wherein a control pin of the chip package is electrically connected to a control terminal contact area of the power transistor by a first bond wire, and wherein the control pin of the chip package is electrically connected to the first pn junction diode of the clamping structure by a second bond wire.

6. The semiconductor device of claim 1 , wherein the power transistor and the clamping structure are integrated in the semiconductor body.

7. The semiconductor device of claim 6 , wherein a drift zone of the power transistor, a cathode region of the second pn junction diode and a cathode region of the first pn junction diode are formed in a same semiconductor region of the semiconductor body.

8. The semiconductor device of claim 7 , wherein a breakdown voltage between the first and second load terminals of the power transistor is greater than a breakdown voltage of the clamping structure connected between the control terminal and the second load terminal.

9. The semiconductor device of claim 1 , wherein the first pn junction diode and the second pn junction diode serially connected back to back form a discrete semiconductor clamping device in a semiconductor package.

10. The semiconductor device of claim 1 , wherein the second contact is at a first surface of the semiconductor body and is electrically connected to the first pn junction diode, and wherein the first contact is at a second surface of the semiconductor body opposite to the first surface.

11. The semiconductor device of claim 10 , further comprising:
a field stop zone between the first contact and a part of the semiconductor body, the field stop zone directly adjoining the first contact and having a doping concentration greater than the part of the semiconductor body.

12. The semiconductor device of claim 11 , wherein the part of the semiconductor body has a doping concentration in a range of 5×10 12 cm −3 , and 2×10 14 cm −3 , and wherein a thickness of the part of the semiconductor body between the first and second surfaces of the semiconductor body is greater than 50 μm.

13. The semiconductor device of claim 11 , wherein the part of the semiconductor body forms a cathode region of the first pn junction diode of the clamping structure.

14. The semiconductor device of claim 13 , further comprising:
an anode region of the first pn junction diode directly adjoining the first surface of the semiconductor body, the anode region being electrically connected to the second contact.

15. The semiconductor device of claim 14 , further comprising:
an edge termination structure surrounding the anode region at the first surface.

16. The semiconductor device of claim 15 , wherein the edge termination structure includes one or more of: field plates; ring structures; junction termination extension structures; and variation of lateral doping structures.

17. The semiconductor device of claim 14 , further comprising:
a buried field stop zone located in the semiconductor body at a vertical distance from the field stop zone.

18. The semiconductor device of claim 17 , wherein the buried field stop zone is located at a vertical distance from the anode region.

19. The semiconductor device of claim 17 , wherein the buried field stop zone directly adjoins the anode region.

20. The semiconductor device of claim 1 , further comprising:
a third pn junction diode electrically connected in parallel with the second pn junction diode.

21. The semiconductor device of claim 1 , wherein the first pn junction diode and the second pn junction diode are connected back to back having anodes connected together.

22. The semiconductor device of claim 1 , wherein the first pn junction diode and the second pn junction diode are connected back to back having cathodes connected together.

23. A semiconductor device, comprising:
a semiconductor body comprising a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact,
wherein a breakdown voltage of the first pn junction diode is greater than 100 V,
wherein a breakdown voltage of the second pn junction diode is greater than 10 V,
wherein the second contact is at a first surface of the semiconductor body and is electrically connected to the first pn junction diode,
wherein the first contact is at a second surface of the semiconductor body opposite to the first surface.

24. The semiconductor device of claim 23 , further comprising:
a field stop zone between the first contact and a part of the semiconductor body, the field stop zone directly adjoining the first contact and having a doping concentration greater than the part of the semiconductor body.

25. The semiconductor device of claim 24 , wherein the part of the semiconductor body forms a cathode region of the first pn junction diode of the clamping structure.

26. The semiconductor device of claim 23 , wherein an anode region of the first pn junction diode directly adjoins the first surface of the semiconductor body and is electrically connected to the second contact.

27. The semiconductor device of claim 26 , further comprising:
an edge termination structure surrounding the anode region at the first surface.

28. The semiconductor device of claim 24 , further comprising:
a buried field stop zone located in the semiconductor body at a vertical distance from the field stop zone.

29. A semiconductor device, comprising:
a semiconductor body comprising a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact; and
a third pn junction d

Assignees

• Infineon Technologies Austria Ag

Inventors

• Voss Stephan
• Baburske Roman
• Basler Thomas
• Kimmer Thomas
• Schulze Hans-Joachim

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/5473

  multiple bond wires connected to a common bond pad · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W70/481 Primary

  for devices being provided for in groups H10D8/00 - H10D48/00 · CPC title

• H10W70/465

  Bumps or wires · CPC title