Systems and methods for selectively enabling and disabling hardware features

US10296332B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10296332-B2
Application numberUS-201615146781-A
CountryUS
Kind codeB2
Filing dateMay 4, 2016
Priority dateMar 12, 2013
Publication dateMay 21, 2019
Grant dateMay 21, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one embodiment, a computer program product includes a computer readable storage medium having stored/encoded thereon: first program instructions executable by a device to cause the device to define a hardware feature policy for one or more hardware components of a system; and second program instructions executable by the device to cause the device to enable and/or disabling one or more hardware features of one or more of the hardware components based on the hardware feature policy, where the hardware feature policy comprises instructions to enable and/or disable access to the one or more hardware features based on one or more criteria.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer program product comprising: a non-transitory computer readable storage medium having stored/encoded thereon: first program instructions executable by a device to cause the device to query device support code with an I/O driver; second program instructions executable by the device to cause the device to determine whether one or more hardware features are enabled for one or more hardware components of a system based on the query; third program instructions executable by the device to cause the device to asynchronously update in response to determining the one or more hardware features are not enabled for at least one of the one or more hardware components, a plurality of host control blocks of the at least one of the one or more hardware components to indicate the hardware features are not enabled for the at least one of the one or more hardware components; fourth program instructions executable by the device to cause the device to verify a stability of the one or more hardware features in response to detecting the asynchronous update; fifth program instructions executable by the device to cause the device to define, in response to verifying the stability of the hardware features, a hardware feature policy for one or more hardware components of a system; sixth program instructions executable by the device to cause the device to build a single channel program to exploit the hardware features in response to defining the hardware feature policy; seventh program instructions executable by the device to cause the device to enable, disable, or enable and disable hardware features of one or more of the hardware components based on the hardware feature policy, wherein the hardware feature policy comprises: eighth program instructions executable by the device to cause the device to selectively enable access to at least some, but not all of the hardware features based on one or more of a plurality of criteria; and ninth program instructions executable by the device to cause the device to selectively disable access to at least some, but not all of the hardware features based on one or more of the plurality of criteria; and wherein disabling the hardware features comprises masking one or more feature codes indicating that a hardware component is configured to utilize the hardware features; wherein enabling access to the hardware features enables access to a plurality of discontiguous memory pages via the single channel program; and wherein the plurality of criteria comprise: a feature access schedule that identifies a time of day when the hardware features are to be enabled and a time of day when the hardware features are to be disabled; a volume feature access group that identifies a set of volumes that are affected by the hardware feature policy; a job feature access group that identifies one or more jobs that are one or more of allowed and denied access to the one or more hardware features; and a user feature access group that identifies one or more users that are one or more of allowed and denied access to the hardware features. 2. A system, comprising: a processor and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to: query device support code with an I/O driver; determine whether one or more hardware features are enabled for one or more hardware components of a system based on the query; asynchronously update, in response to determining the one or more hardware features are not enabled for at least one of the one or more hardware components, a plurality of host control blocks of the at least one of the one or more hardware components to indicate the hardware features are not enabled for the at least one of the one or more hardware components; verify a stability of the one or more hardware features in response to detecting the asynchronous update; define, in response to verifying the stability of the hardware features, a hardware feature policy for one or more hardware components of a system; build a single channel program to exploit the hardware features in response to defining the hardware feature policy; selectively and automatically enable, disable, or enable and disable one or more hardware features of one or more of the hardware components based on the hardware feature policy, wherein the hardware feature policy comprises: instructions to selectively enable access to at least some, but not all of the hardware features based on one or more of a plurality of criteria; and instructions to selectively access to at least some, but not all of the hardware features based on one or more of the plurality of criteria; and wherein disabling the hardware features comprises masking one or more feature codes indicating that a hardware component is configured to utilize the hardware features; wherein enabling access to the one or more hardware features enables access to a plurality of discontiguous memory pages via the single channel program; and wherein the plurality of criteria comprise: a feature access schedule that identifies a time of day when the hardware features are to be enabled and a time of day when the hardware features are to be disabled; a volume feature access group that identifies a set of volumes that are affected by the hardware feature policy; a job feature access group that identifies one or more jobs that are one or more of allowed and denied access to the one or more hardware features; and a user feature access group that identifies one or more users that are one or more of allowed and denied access to the hardware features.

Assignees

Inventors

Classifications

  • Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs (verification or detection of system hardware configuration G06F11/2247) · CPC title

  • using an embedded synchronisation, e.g. Firewire bus, Fibre Channel bus, SSA bus · CPC title

  • using successive scanning, e.g. polling (G06F13/24 takes precedence) · CPC title

  • G06F9/468Primary

    Specific access rights for resources, e.g. using capability register · CPC title

  • Configuring for operating with peripheral devices; Loading of device drivers · CPC title

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Frequently asked questions

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What does patent US10296332B2 cover?
In one embodiment, a computer program product includes a computer readable storage medium having stored/encoded thereon: first program instructions executable by a device to cause the device to define a hardware feature policy for one or more hardware components of a system; and second program instructions executable by the device to cause the device to enable and/or disabling one or more hardw…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F9/468. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 21 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).