Methods for selectively enabling and disabling hardware features

US9400679B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9400679-B2
Application numberUS-201314064040-A
CountryUS
Kind codeB2
Filing dateOct 25, 2013
Priority dateMar 12, 2013
Publication dateJul 26, 2016
Grant dateJul 26, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one embodiment, a method includes defining a hardware feature policy for one or more hardware components of a system; and enabling and/or disabling one or more hardware features of one or more of the hardware components based on the hardware feature policy, where the hardware feature policy comprises instructions to enable and/or disable access to the one or more hardware features based on one or more criteria selected from the group consisting of: a feature access schedule; a volume feature access group; a job feature access group; and an user feature access group.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer implemented method, comprising: defining a hardware feature policy for one or more hardware components of a system; one or more of enabling and disabling hardware features of one or more of the hardware components based on the hardware feature policy; and wherein the hardware feature policy comprises instructions to one or more of enable and disable access to the hardware features, wherein access is enabled to a plurality of the hardware features via a single channel program based on one or more criteria selected from a group consisting of: a feature access schedule; a volume feature access group; a job feature access group; and an user feature access group; and querying device support code with an I/O driver; determining whether the hardware features are enabled for at least one of the one or more hardware components based in the query; asynchronously updating a plurality of host control blocks of the hardware components of the system in response to determining the hardware features are not enabled for at least one of the one or more hardware components; verifying a stability of the hardware features in response to detecting the asynchronous update; defining the hardware feature policy in response to verifying the stability of the hardware features; and building a single channel program to exploit the hardware features in response to defining the hardware feature policy; wherein the feature access schedule identifies a time of day when the hardware features are to be enabled and a time of day when the hardware features are to be disabled; wherein the volume feature access group identifies one or more of: a set of volumes that are affected by the hardware feature policy; a set of volumes having at least a minimum available storage space; and a set of volumes having access to a particular set of resources; wherein the job feature access group identifies one or more jobs that are one or more of allowed and denied access to the one or more hardware features based on one or more criteria selected from: a user-defined job priority; a job type; a job name; a flag associated with a job, the flag designating a job type; and a job origin point; wherein the user feature access group identifies one or more users that are one or more of allowed and denied access to the hardware features based on one or more criteria selected from: a user type; a username; a user account permission setting; and a user category; wherein disabling hardware features comprises masking one or more feature codes indicating that a hardware component is configured to utilize the hardware features; and wherein enabling access to the hardware features enables access to a plurality of discontiguous memory pages via the single channel program.

Assignees

Inventors

Classifications

  • G06F9/468Primary

    Specific access rights for resources, e.g. using capability register · CPC title

  • G06F9/226Primary

    Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format · CPC title

  • using successive scanning, e.g. polling (G06F13/24 takes precedence) · CPC title

  • Standardisation; Integration · CPC title

  • Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs (verification or detection of system hardware configuration G06F11/2247) · CPC title

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What does patent US9400679B2 cover?
In one embodiment, a method includes defining a hardware feature policy for one or more hardware components of a system; and enabling and/or disabling one or more hardware features of one or more of the hardware components based on the hardware feature policy, where the hardware feature policy comprises instructions to enable and/or disable access to the one or more hardware features based on o…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F9/468. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).