Cooperative thread array granularity context switch during trap handling

Patent metadata

Field	Value
Publication number	US-10289418-B2
Application number	US-201213728784-A
Country	US
Kind code	B2
Filing date	Dec 27, 2012
Priority date	Dec 27, 2012
Publication date	May 14, 2019
Grant date	May 14, 2019

Abstract

Techniques are provided for handling a trap encountered in a thread that is part of a thread array that is being executed in a plurality of execution units. In these techniques, a data structure with an identifier associated with the thread is updated to indicate that the trap occurred during the execution of the thread array. Also in these techniques, the execution units execute a trap handling routine that includes a context switch. The execution units perform this context switch for at least one of the execution units as part of the trap handling routine while allowing the remaining execution units to exit the trap handling routine before the context switch. One advantage of the disclosed techniques is that the trap handling routine operates efficiently in parallel processors.

First claim

What is claimed is:

1. A method for executing a first trapping instruction encountered by a thread executing within a processing core, the method comprising:
determining that a first thread included in a first thread group executing within the processing core is executing the first trapping instruction, wherein the first thread group is included in a plurality of thread groups executing within the processing core;
in response to determining that the first thread is executing the first trapping instruction, pausing execution of the first thread group for a predetermined number of instruction cycles;
for each thread group included in the plurality of thread groups executing within the processing core, entering a trap handler routine after the first thread group has been paused for the predetermined number of instruction cycles;
for each thread group included in the plurality of thread groups, determining whether a corresponding cooperative thread array (CTA) identifier is associated with a CTA that includes the first thread; and
if the corresponding CTA identifier is not associated with the CTA that includes the first thread, then exiting the trap handler routine, or
if the corresponding CTA identifier is associated with the CTA that includes the first thread, then:
disabling interrupts,
after disabling interrupts, executing one or more critical instructions to update a first entry included in a trap table;
enabling interrupts, and
after enabling interrupts, executing one or more operations associated with the trap handler routine prior to exiting the trap handler routine.

2. The method of claim 1 , wherein if the corresponding CTA identifier is associated with the CTA that includes the first thread, then further comprising:
storing a first portion of a context associated with the first thread group in a memory;
prior to storing a second portion of the context associated with the first thread group, indicating that each thread group included in the plurality of thread groups may resume execution outside of the trap hander routine; and
storing the second portion of the context associated with the first thread group in the memory.

3. The method of claim 2 , further comprising:
determining that each thread group within the CTA that includes the first thread has executed one or more operations associated with the trap handler routine; and
removing each thread group within the CTA that includes the first thread from active execution in the processing core.

4. The method of claim 2 , further comprising:
determining that all thread groups executing within the processing core have indicated that each thread group included in the plurality of thread groups may resume execution outside of the trap hander routine; and
causing the first thread group to resume execution outside of the trap hander routine.

5. The method of claim 2 , further comprising:
determining that the first thread group includes the thread that encountered the first trapping instruction; and
executing one or more instructions prior to storing the first portion of the context.

6. The method of claim 5 , wherein determining that the first thread group includes the thread that encountered the first trapping instruction comprises:
retrieving an entry associated with the first thread group from a data structure comprising trap information for each thread group included in a plurality of thread groups; and
determining that the first thread has updated the entry associated with the first thread group.

7. The method of claim 2 , further comprising:
prior to executing the one or more operations associated with the trap handler routine, waiting for a predetermined period of time; and
determining that a second thread included in one of the thread groups executing a second trapping instruction.

8. The method of claim 1 , wherein the first entry included in the trap table comprises any one or more of a trap reason, a location of a user-specified save routine, a location of a context buffer, and an identifier associated with the first thread.

9. The method of claim 1 , wherein the predetermined number of instruction cycles is configurable via a privileged register setting.

10. The method of claim 1 , further comprising, while pausing execution of the first thread group for the predetermined number of instruction cycles, determining that another thread encounters a second trapping instruction, the another thread also included in another thread group included in the plurality of thread groups executing within the processing core.

11. The method of claim 10 , wherein the first trapping instruction and the second trapping instruction are processed by the trap handler routine after the first thread group is paused for the predetermined number of instruction cycles.

12. A non-transitory computer readable storage medium comprising instructions that cause a computer system to carry out a method for executing a first trapping instruction encountered by a thread executing within a processing core, comprising the steps of:
determining that a first thread included in a first thread group executing within the processing core is executing the first trapping instruction, wherein the first thread group is included in a plurality of thread groups executing within the processing core;
in response to determining that the first thread is executing the first trapping instruction, pausing execution of the first thread group for a predetermined number of instruction cycles;
for each thread group included in the plurality of thread groups executing within the processing core, entering a trap handler routine after the first thread group has been paused for the predetermined number of instruction cycles;
for each thread group included in the plurality of thread groups, determining whether a corresponding cooperative thread array (CTA) identifier is associated with a CTA that includes the first thread; and
if the corresponding CTA identifier is not associated with the CTA that includes the first thread, then exiting the trap handler routine, or
if the corresponding CTA identifier is associated with the CTA that includes the first thread, then:
disabling interrupts,
after disabling interrupts, executing one or more critical instructions to update a first entry included in a trap table;
enabling interrupts, and
after enabling interrupts, executing one or more operations associated with the trap handler routine prior to exiting the trap handler routine.

13. The non-transitory computer readable storage medium of claim 12 , wherein if the corresponding CTA identifier is associated with the CTA that includes the first thread, then the method further comprises:
storing a first portion of a context associated with the first thread group in a memory;
prior to storing a second portion of the context associated with the first thread group, indicating that each thread group included in the plurality of thread groups may resume execution outside of the trap hander routine; and
storing the second portion of the context associated with the first thread group in the memory.

14. The non-transitory computer readable storage medium of claim 13 , wherein the method further comprises:
determining that each thread group within the CTA that includes the first thread has executed one or more operations associated with the trap handler routine; and
removing each thread group within the CTA that includes the first thread from active execution in the processing core.

15. The non-transitory computer readable storage medium of claim 13 , wherein the method further comprise

Assignees

• Nvidia Corp

Inventors

• Luiz Gerald F
• Cuadra Philip Alexander
• Durant Luke
• Gadre Shirish
• Ohannessian Robert
• Shah Lacky V
• Wang Nicholas
• Danskin Arthur

Classifications

• G06F9/3887

  controlled by a single instruction for multiple data lanes [SIMD] · CPC title

• G06F9/3861

  Recovery, e.g. branch miss-prediction, exception handling (error detection or correction G06F11/00) · CPC title

• G06F9/3851 Primary

  from multiple instruction streams, e.g. multistreaming · CPC title

• G06F9/4812

  by interrupt, e.g. masked · CPC title

• G06F9/3888

  controlled by a single instruction for multiple threads [SIMT] in parallel · CPC title