Capacitors

US10283586B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10283586-B2
Application numberUS-201615059807-A
CountryUS
Kind codeB2
Filing dateMar 3, 2016
Priority dateJun 11, 2015
Publication dateMay 7, 2019
Grant dateMay 7, 2019

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Back end of the line (BEOL) capacitors and methods of manufacture are provided. The method includes forming wiring lines on a substrate, with spacing between adjacent wiring lines. The method further includes forming an air gap within spacing between the adjacent wiring lines by deposition of a capping material. The method further includes opening the air gap between selected adjacent wiring lines. The method further includes depositing conductive material within the opened air gap.

First claim

Opening claim text (preview).

What is claimed: 1. A back end of line capacitor comprising: a bottom plate comprising a plurality of separate metal lines separated by spacing; a dielectric layer lining the separate metal lines within the spacing; an insulator material on an contacting an upper surface of the dielectric layer; and a top plate above the separate metal lines and within the spacing over the dielectric layer, wherein the top plate is within a trench in the insulator material and a trench in the dielectric layer, wherein the plurality of separate metal lines are on an insulator layer, and further comprising: a first other metal line on the insulator layer, wherein a portion of the insulator layer extends between and contacts sidewalls of the first other metal line and one of the plurality of separate metal lines; a second other metal line on the insulator layer, wherein the dielectric layer encloses an air gap in a spacing between the first other metal line and the second other metal line. 2. The back end of line capacitor of claim 1 , wherein the dielectric layer comprises a planarized surface. 3. The back end of line capacitor of claim 1 , wherein the dielectric layer is nitride material. 4. The back end of line capacitor of claim 1 , wherein the insulator material is an ultra low dielectric material. 5. The back end of line capacitor of claim 1 , further comprising another trench in the insulator material separated from the top plate by a portion of the insulator material. 6. The back end of line capacitor of claim 5 , wherein the trench and the other trench have offset depths. 7. The back end of line capacitor of claim 6 , wherein the top plate is provided over the spacing between the separate metal lines of the bottom plate. 8. The back end of line capacitor of claim 7 , wherein the top plate is provided within the spacing between the plurality of separate metal lines of the bottom plate, and separated from the plurality of separate metal lines of the bottom plate by the dielectric layer. 9. The back end of line capacitor of claim 8 , wherein the top plate provided within the spacing is formed in an airgap that has an opened upper portion. 10. The back end of line capacitor of claim 1 , wherein the dielectric layer is above the plurality of separate metal lines. 11. The back end of line capacitor of claim 1 , wherein the dielectric layer is one of nitride, NBLOK material, and a diffusion barrier metal. 12. The back end of line capacitor of claim 1 , wherein the top plate is surrounded by the insulating material at sidewalls of the top plate. 13. The back end of line capacitor of claim 1 , wherein a width of the separate metal lines is larger than the width of the spacing. 14. The back end of line capacitor of claim 5 , further comprising a conductive material in the other trench. 15. The back end of line capacitor of claim 14 , wherein: the insulator material contacts sidewalls of the top plate; and the insulator material contacts sidewalls and a bottom surface of the conductive material. 16. The back end of line capacitor of claim 14 , wherein a bottom surface of the conductive material is vertically offset from a bottom surface of the top plate. 17. The back end of line capacitor of claim 14 , wherein: a bottom surface of the top plate is vertically below a top surface of the dielectric layer; and a bottom surface of the conductive material is vertically above the top surface of the dielectric layer. 18. The back end of line capacitor of claim 1 , wherein the top plate comprises a conductive material that extends into gaps lined by the dielectric layer between respective ones of the plurality of separate metal lines.

Assignees

Inventors

Classifications

  • by chemical means · CPC title

  • the principal metal being copper · CPC title

  • Capacitor integral with wiring layers · CPC title

  • Capacitive arrangements or effects of, or between wiring layers · CPC title

  • by forming openings in the dielectric parts · CPC title

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Frequently asked questions

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What does patent US10283586B2 cover?
Back end of the line (BEOL) capacitors and methods of manufacture are provided. The method includes forming wiring lines on a substrate, with spacing between adjacent wiring lines. The method further includes forming an air gap within spacing between the adjacent wiring lines by deposition of a capping material. The method further includes opening the air gap between selected adjacent wiring li…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01L28/88. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 07 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).