Method of manufacturing CZ silicon wafers, and method of manufacturing a semiconductor device

Patent metadata

Field	Value
Publication number	US-10273597-B2
Application number	US-201715636926-A
Country	US
Kind code	B2
Filing date	Jun 29, 2017
Priority date	Jun 30, 2016
Publication date	Apr 30, 2019
Grant date	Apr 30, 2019

Abstract

In accordance with a method of manufacturing CZ silicon wafers, a parameter of at least two of the CZ silicon wafers is measured. A group of the CZ silicon wafers falling within a tolerance of a target specification is determined. The group of the CZ silicon wafers is divided into sub-groups taking into account the measured parameter. An average value of the parameter of the CZ silicon wafers of each sub-group differs among the sub-groups, and a tolerance of the parameter of the CZ silicon wafers of each sub-group is smaller than a tolerance of the parameter of the target specification. A labeling configured to distinguish between the CZ silicon wafers of different sub-groups is prepared. The CZ silicon wafers falling within the tolerance of the target specification are packaged.

First claim

What is claimed is:

1. A method of manufacturing Czhochralski (CZ) silicon wafers, comprising:
slicing a CZ silicon ingot to form a plurality of CZ silicon wafers;
determining a semiconductor material parameter of each CZ silicon wafer, wherein the determined parameter includes at least one of a resistivity, a diameter, a thickness, a total thickness variation, a bow, a warp, and oxygen and doping concentrations;
dividing the silicon wafers in sub-groups based on the determined parameter, wherein an average value of the determined parameter of the CZ silicon wafers differs among the sub-groups, and wherein a tolerance of the determined parameter of the CZ silicon wafers of each sub-group is smaller than a tolerance of the parameter set by a target specification; and
labeling each sub-group of CZ silicon wafers with a different label which is indicative of the determined parameter.

2. The method of claim 1 , wherein the labeling distinguishes between the silicon wafers of different sub-groups by a position in a shipping case.

3. The method of claim 1 , wherein the labeling distinguishes between the CZ silicon wafers of different sub-groups by a mark on the CZ silicon wafers.

4. The method of claim 1 , wherein the CZ silicon wafers of different sub-groups are thinned to different target thicknesses.

5. The method of claim 4 , wherein the different target thicknesses are implemented such that they increase with increasing average resistivity of each sub-group.

6. The method of claim 1 , wherein determining the parameter includes measuring the parameter of each silicon wafer.

7. The method of claim 1 , wherein determining a parameter for a plurality of CZ silicon wafers sliced from a same region of the CZ silicon ingot comprises determining an average of measured parameters of at least two CZ silicon wafers of the plurality of CZ silicon wafers sliced from the same region.

Assignees

• Infineon Technologies Ag

Inventors

• Freund Johannes
• Wuebben Thomas
• Oefner Helmut
• Schulze Hans-Joachim

Classifications

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10P74/207

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title

• C30B15/02

  adding crystallising materials or reactants forming it in situ to the melt · CPC title

• B28D5/00

  Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor (working by grinding or polishing B24; for artistic purposes B44B) · CPC title

• C30B33/00

  After-treatment of single crystals or homogeneous polycrystalline material with defined structure (C30B31/00 takes precedence) · CPC title