Multilayer wiring substrate

Patent metadata

Field	Value
Publication number	US-10249563-B2
Application number	US-201715607757-A
Country	US
Kind code	B2
Filing date	May 30, 2017
Priority date	Dec 19, 2014
Publication date	Apr 2, 2019
Grant date	Apr 2, 2019

Abstract

Provided is a multilayer wiring substrate capable of achieving excellent conduction reliability. The multilayer wiring substrate is formed by laminating an anisotropic conductive member including an insulating base which is made of an inorganic material, a plurality of conductive paths which are made of a conductive member, penetrate the insulating base in a thickness direction thereof and are provided in a mutually insulated state, and a pressure sensitive adhesive layer which is provided on a surface of the insulating base, in which each conductive path has a protrusion protruding from the surface of the insulating base, and a wiring substrate having a substrate and one or more electrodes to be formed on the substrate, and conductive paths which come into contact with the electrode among the plurality of conductive paths are deformed so that adjacent conductive paths come into contact with each other.

First claim

What is claimed is:

1. A multilayer wiring substrate comprising:
an anisotropic conductive member including an insulating base which is made of an inorganic material, a plurality of conductive paths which are made of a conductive member, penetrate the insulating base in a thickness direction thereof and are provided in a mutually insulated state, and a pressure sensitive adhesive layer which is provided on a surface of the insulating base, in which each conductive path has a protrusion protruding from the surface of the insulating base; and
a wiring substrate having a substrate and one or more electrodes to be formed on the substrate,
wherein the multilayer wiring substrate is formed by laminating the anisotropic conductive member and the wiring substrate,
the wiring substrate has a resin layer which covers at least a part of the substrate,
the electrode is formed to be flush with the resin layer,
the resin layer is a layer that allows the protrusion to penetrate therein when pressure is applied at 20 MPa,
at least a part of the protrusions of the conductive paths other than the conductive paths which come in contact with the electrode among the plurality of conductive paths penetrates into the resin layer, and
conductive paths which come into contact with the electrode among the plurality of conductive paths are deformed so that adjacent conductive paths come into contact with each other.

2. The multilayer wiring substrate according to claim 1 ,
wherein the protrusions of the conductive paths other than the conductive paths which come in contact with the electrode among the plurality of conductive paths are embedded in the pressure sensitive adhesive layer.

3. The multilayer wiring substrate according to claim 2 ,
wherein materials for the electrode and the conductive path are the same.

4. The multilayer wiring substrate according to claim 2 ,
wherein the material for the conductive path is copper.

5. The multilayer wiring substrate according to claim 2 ,
wherein the pressure sensitive adhesive layer does not contain a filler.

6. The multilayer wiring substrate according to claim 1 ,
wherein materials for the electrode and the conductive path are the same.

7. The multilayer wiring substrate according to claim 6 ,
wherein the material for the conductive path is copper.

8. The multilayer wiring substrate according to claim 7 ,
wherein the pressure sensitive adhesive layer does not contain a filler.

9. The multilayer wiring substrate according to claim 6 ,
wherein the pressure sensitive adhesive layer does not contain a filler.

10. The multilayer wiring substrate according to claim 1 ,
wherein materials for the electrode and the conductive path are the same.

11. The multilayer wiring substrate according to claim 1 ,
wherein the material for the conductive path is copper.

12. The multilayer wiring substrate according to claim 1 ,
wherein the material for the conductive path is copper.

13. The multilayer wiring substrate according to claim 1 ,
wherein the pressure sensitive adhesive layer does not contain a filler.

14. The multilayer wiring substrate according to claim 1 ,
wherein the pressure sensitive adhesive layer does not contain a filler.

15. The multilayer wiring substrate according to claim 1 ,
wherein conductive paths which come into contact with the electrode among the plurality of conductive paths are deformed so that adjacent conductive paths come into direct contact with each other.

Assignees

• Fujifilm Corp

Inventors

• Kurooka Shunji
• Hotta Yoshinori

Classifications

• H05K3/323 Primary

  by applying an anisotropic conductive adhesive layer over an array of pads · CPC title

• H01R11/01

  characterised by the form or arrangement of the conductive interconnection between the connecting locations · CPC title

• H01R12/00

  Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures (printed connections to, or between, printed circuits H05K1/11) · CPC title

• H05K3/36

  Assembling printed circuits with other printed circuits {(H05K7/142 takes precedence)} · CPC title

• H05K1/18

  structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title