Power efficient complementary amplifier and method thereof
US-2024313721-A1 · Sep 19, 2024 · US
US10243523B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10243523-B2 |
| Application number | US-201715725212-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 4, 2017 |
| Priority date | Oct 4, 2016 |
| Publication date | Mar 26, 2019 |
| Grant date | Mar 26, 2019 |
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Design of ultra broadband transimpedance amplifiers (TIA) for optical fiber communications is disclosed. In one embodiment, a TIA comprises a gm-boosted dual-feedback common-base stage, a level shifter and an RC-degenerated common-emitter stage, and a first emitter-follower stage, wherein the first emitter follower stage is inductively degenerated. An output of the TIA is buffered using a second emitter-follower stage.
Opening claim text (preview).
The invention claimed is: 1. A transimpedance amplifier (TIA), comprising: a g m -boosted dual-feedback common-base stage; a level shifter and an RC-degenerated common-emitter stage; and a first emitter-follower stage, wherein the first emitter follower stage is inductively degenerated; wherein an output of the TIA is buffered using a second emitter-follower stage. 2. The TIA of claim 1 , wherein the g m -boosted dual-feedback common-base stage comprises: a shunt-in-shunt-out positive feedback realized with a mutually coupled inductor pair comprising a first inductor (L 2 ) and a second inductor (L 3 ); and a local resistive shunt-in-shunt-out negative feedback comprising a first resistor (R 2 ). 3. The TIA of claim 2 , wherein the g m -boosted dual-feedback common-base stage further comprises: a g m -boosting transistor (B 1 ) driving a series load comprising a second resistor (R 1 ) and a third inductor (L 1 ). 4. The TIA of claim 1 , wherein the RC-degenerated common-emitter stage comprises: a level shifter comprising a first transistor (B 5 ) and a third resistor (R 5 ); and an emitter degeneration stage comprising a second transistor (B 6 ), a fourth resistor (R 6 ), and a varactor comprising a first capacitor (C 6 ). 5. The TIA of claim 4 , wherein the RC-degenerated common-emitter stage introduces a zero pole at a first frequency, wherein the first frequency is 1/(2πR 6 C 6 ). 6. The TIA of claim 4 , wherein the RC-degenerated common-emitter stage introduces a high frequency pole at a second frequency, wherein the second frequency is (1+g m 6 R 6 )/2πR 6 C 6 . 7. The TIA of claim 1 , wherein the first emitter-follower stage comprises: a fourth inductor (L 4 ); and a fifth inductor (L 5 ); wherein the fourth inductor (L 4 ) introduces a series peaking behavior to the output of the transimpedance amplifier (TIA); and wherein the fifth inductor (L 5 ) degenerates the first emitter-follower stage. 8. A method of converting an input current signal to an output voltage signal using a transimpedance amplifier (TIA), the method comprising: applying the input current signal to a g m -boosted dual-feedback common-base stage of the TIA; electrically coupling the g m -boosted dual-feedback common-base stage of the TIA with a level shifter and RC-degenerated common-emitter stage of the TIA; electrically coupling the level shifter and RC-degenerated common-emitter stage with a first emitter-follower stage of the TIA, wherein the first emitter follower stage is inductively degenerated; and buffering the output voltage signal using a second emitter-follower stage. 9. The method of claim 8 , wherein the g m -boosted dual-feedback common-base stage of the TIA comprises: a shunt-in-shunt-out positive feedback realized with a mutually coupled inductor pair comprising a first inductor (L 2 ) and a second inductor (L 3 ); and a local resistive shunt-in-shunt-out negative feedback comprising a first resistor (R 2 ). 10. The method of claim 9 , wherein the g m -boosted dual-feedback common-base stage of the TIA further comprises: a g m -boosting transistor (B 1 ) driving a series load comprising a second resistor (R 1 ) and a third inductor (L 1 ). 11. The method of claim 8 , wherein the RC-degenerated common-emitter stage of the TIA comprises: a level shifter comprising a first transistor (B 5 ) and a third resistor (R 5 ); and an emitter degeneration stage comprising a second transistor (B 6 ), a fourth resistor (R 6 ), and a varactor comprising a first capacitor (C 6 ). 12. The method of claim 11 , wherein the RC-degenerated common-emitter stage of the TIA introduces a zero pole at a first frequency, wherein the first frequency is 1/(2πR 6 C 6 ). 13. The method of claim 12 , wherein the RC-degenerated common-emitter stage of the TIA introduces a high frequency pole at a second frequency, wherein the second frequency is (1+g m 6 R 6 )/2πR 6 C 6 . 14. The method of claim 8 , wherein the first emitter-follower stage of the TIA comprises: a fourth inductor (L 4 ); and a fifth inductor (L 5 ); wherein the fourth inductor (L 4 ) introduces a series peaking behavior to the output of the transimpedance amplifier (TIA); and wherein the fifth inductor (L 5 ) degenerates the first emitter-follower stage.
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