Impedance transformation circuit for amplifier

US9825597B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9825597-B2
Application numberUS-201615389097-A
CountryUS
Kind codeB2
Filing dateDec 22, 2016
Priority dateDec 30, 2015
Publication dateNov 21, 2017
Grant dateNov 21, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to linearize the amplifier.

First claim

Opening claim text (preview).

What is claimed is: 1. A low noise amplifier comprising: a matching circuit including a first inductor, a series inductor having a first end configured to receive a radio frequency signal and a second end electrically coupled to the first inductor, and a shunt capacitor electrically coupled to the first end of the series inductor; an amplification circuit configured to receive the radio frequency signal by way of the first inductor and to amplify the radio frequency signal; and a second inductor, the first and second inductors magnetically coupled to each other to provide negative feedback to linearize the low noise amplifier. 2. The low noise amplifier of claim 1 wherein the amplification circuit includes a common source amplifier and the second inductor is a source degeneration inductor. 3. The low noise amplifier of claim 2 wherein the amplification circuit further includes a cascode transistor in series with the common source amplifier. 4. The low noise amplifier of claim 1 wherein the amplification circuit includes a common emitter amplifier and the second inductor is an emitter degeneration inductor. 5. The low noise amplifier of claim 4 wherein the amplification circuit further includes a cascode transistor in series with the common emitter amplifier. 6. The low noise amplifier of claim 1 wherein the first inductor, the second inductor, and the amplification circuit of amplifier are embodied on a single die. 7. A low noise amplifier comprising: a matching circuit including a first inductor, a series inductor having a first end configured to receive a radio frequency signal and a second end electrically coupled to the first inductor, and a direct current blocking capacitor configured to provide the radio frequency signal to the series inductor; an amplification circuit configured to receive the radio frequency signal by way of the first inductor and to amplify the radio frequency signal; and a second inductor, the first and second inductors magnetically coupled to each other to provide negative feedback to linearize the low noise amplifier. 8. The low noise amplifier of claim 7 wherein the matching circuit further includes a shunt capacitor electrically coupled to the first end of the series inductor. 9. An impedance transformation circuit for use in an amplifier, the impedance transformation circuit comprising: a matching circuit including a first inductor a series inductor having a first end configured to receive a radio frequency signal and a second end electrically coupled to the first inductor, and at least one of a shunt capacitor electrically coupled to the first end of the series inductor or a direct current blocking capacitor configured to provide the radio frequency signal to the series inductor; and a second inductor, the first and second inductors magnetically coupled to each other to provide negative feedback to linearize the amplifier. 10. The impedance transformation circuit of claim 9 wherein the second inductor is configured as a source degeneration inductor. 11. The impedance transformation circuit of claim 9 wherein the second inductor is configured as an emitter degeneration inductor. 12. The impedance transformation circuit of claim 9 wherein the first inductor is configured to provide the radio frequency signal to an amplification circuit of the amplifier. 13. A front end system comprising: a low noise amplifier including (i) a matching circuit including a first inductor, a series inductor having a first end configured to receive a radio frequency signal and a second end electrically coupled to the first inductor, and at least one of a shunt capacitor electrically coupled to the first end of the series inductor or a direct current blocking capacitor configured to provide the radio frequency signal to the series inductor; (ii) an amplification circuit configured to receive the radio frequency signal by way of the first inductor and to amplify the radio frequency signal; and (iii) a second inductor magnetically coupled with the first inductor to provide negative feedback to linearize the low noise amplifier; and a bypass path. 14. The front end system of claim 13 further comprising a multi-throw switch having at least a first throw electrically connected to the low noise amplifier and a second throw electrically connected to the bypass path. 15. The front end system of claim 14 further comprising a power amplifier, the multi-throw switch having a third throw electrically coupled to the power amplifier. 16. The front end system of claim 14 further comprising a second multi-throw switch having at least a first throw electrically connected to the low noise amplifier and a second throw electrically connected to the bypass path, the low noise amplifier being included in a first signal path between the multi-throw switch and the second multi-throw switch, and the bypass path being included in a second signal path between the multi-throw switch and the second multi-throw switch. 17. The front end system of claim 14 wherein the multi-throw switch is configured to electrically connect an input of the low noise amplifier to an antenna port in a first state, and the multi-throw switch is configured to electrically connect the bypass path to the antenna port in a second state. 18. The front end system of claim 13 wherein the amplification circuit includes a cascode transistor in series with either a common source amplifier or a common emitter amplifier. 19. The front end system of claim 13 wherein the matching circuit includes the shunt capacitor. 20. The front end system of claim 13 wherein the matching circuit includes the direct current blocking capacitor. 21. The front end system of claim 13 wherein the matching circuit includes the shunt capacitor and the direct current blocking capacitor.

Assignees

Inventors

Classifications

  • A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • H03F1/565Primary

    using inductive elements · CPC title

  • Supply circuits (converters H02M; filters therefor H02M1/14; voltage stabilisers G05F1/46) · CPC title

  • the amplifier stage being a common source configuration MOSFET · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9825597B2 cover?
Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to lin…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/565. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).