Structures and methods for embedded magnetic random access memory (MRAM) fabrication

Patent metadata

Field	Value
Publication number	US-10243020-B1
Application number	US-201715799502-A
Country	US
Kind code	B1
Filing date	Oct 31, 2017
Priority date	Oct 31, 2017
Publication date	Mar 26, 2019
Grant date	Mar 26, 2019

Abstract

A magnetic random access memory (MRAM) device includes a conductor disposed in an insulating material of a lower wiring layer, a magnetic tunnel junction (MTJ) structure formed in an upper wiring layer, and a landing pad formed in an intermediary wiring layer between the lower and upper wiring layers, the landing pad extending from a top surface of the conductor to a height above the intermediary wiring layer, wherein the landing pad connects the MJT structure to the conductor.

First claim

What is claimed is:

1. A method for forming a magnetic random access memory (MRAM) device, comprising:
forming at least one conductor disposed in a lower wiring layer;
forming an intermediary wiring layer having metallization lines formed in an insulating material;
forming a via in the insulating material of the intermediary wiring layer down to the lower wiring layer in an MRAM region to expose the at least one conductor;
depositing a conductive material in the via, the conductive material traversing multiple wiring layers in addition to the intermediary wiring layer;
planarizing the conductive material to a height above the intermediary wiring layer to form a landing pad extending from a top surface of the at least one conductor to the height;
forming a magnetic tunnel junction (MTJ) structure in an upper wiring layer disposed over the landing pad such that the landing pad connects the MTJ structure to the at least one conductor, the MTJ structure being formed in direct contact with the landing pad; and
forming contacts to the MTJ structure in the upper wiring layer.

2. The method of claim 1 , wherein the landing pad is formed from a same material such that the landing pad is free of interfaces.

3. The method of claim 1 , further comprising forming spacers on sidewalls of the MTJ structure to prevent diffusion and protect the MTJ structure from subsequent processing.

4. The method of claim 1 , further comprising conformally depositing at least one etch stop layer disposed between the lower wiring layer and the intermediary wiring layer.

5. The method of claim 1 , further comprising conformally depositing at least one etch stop layer disposed between the intermediary wiring layer and the upper wiring layer.

6. The method of claim 1 , wherein forming the MTJ structure further comprises:
depositing at least two magnetic layers separated by a non-magnetic tunnel barrier layer; and
patterning the at least two magnetic layers and the non-magnetic tunnel barrier layer to form the MTJ structure.

7. The method of claim 1 , further comprising depositing a dielectric material above the intermediary wiring level and around the MTJ structure to form the upper wiring level.

8. The method of claim 1 , wherein the landing pad is in direct contact with the at least one conductor in the lower wiring layer.

9. A method for forming a magnetic random access memory (MRAM) device, comprising:
forming at least one conductor disposed in a lower wiring layer;
forming an intermediary wiring layer having metallization lines formed in an insulating material;
forming a via in the insulating material of the intermediary wiring layer down to the lower wiring layer in an MRAM region to expose the at least one conductor;
depositing a conductive material in the via, the conductive material traversing multiple wiring layers in addition to the intermediary wiring layer;
planarizing the conductive material to a height above the intermediary wiring layer to form a landing pad extending from a top surface of the at least one conductor to the height, the landing pad being formed from a same material such that the landing pad is free of interfaces;
forming a magnetic tunnel junction (MTJ) structure in an upper wiring layer disposed over the landing pad such that the landing pad connects the MTJ structure to the at least one conductor, the MTJ structure being formed in direct contact with the landing pad;
forming spacers on sidewalls of the MTJ structure to prevent diffusion; and
forming contacts to the MTJ structure in the upper wiring layer.

10. The method of claim 9 , further comprising conformally depositing at least one etch stop layer disposed between the lower wiring layer and the intermediary wiring layer.

11. The method of claim 9 , further comprising conformally depositing at least one etch stop layer disposed between the intermediary wiring layer and the upper wiring layer.

12. The method of claim 9 , further comprising depositing a dielectric material above the intermediary wiring level and around the MTJ structure to form the upper wiring level.

13. The method of claim 9 , wherein the landing pad is in direct contact with the at least one conductor in the lower wiring layer.

Assignees

• IBM

Inventors

• Clevenger Lawrence A
• Lanzillo Nicholas A
• Rizzolo Michael
• Standaert Theodorus E

Classifications

• H01L43/02

  Electricity · mapped topic

• H01L43/12

  Electricity · mapped topic

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• H01L43/08

  Electricity · mapped topic

• H01L27/228 Primary

  Electricity · mapped topic