Power electronics assemblies having a semiconductor cooling chip and an integrated fluid channel system

Patent metadata

Field	Value
Publication number	US-10224265-B2
Application number	US-201816022066-A
Country	US
Kind code	B2
Filing date	Jun 28, 2018
Priority date	Mar 8, 2016
Publication date	Mar 5, 2019
Grant date	Mar 5, 2019

Abstract

A power electronics assembly includes a semiconductor device stack having a wide bandgap semiconductor device, a semiconductor cooling chip thermally coupled to the wide bandgap semiconductor device, and a first electrode electrically coupled to the wide bandgap semiconductor device and positioned between the wide bandgap semiconductor device and the semiconductor cooling chip. The semiconductor cooling chip is positioned between a substrate layer and the wide bandgap semiconductor device. The substrate layer includes a substrate inlet port and a substrate outlet port. An integrated fluid channel system extends between the substrate inlet port and the substrate outlet port and includes a substrate fluid inlet channel extending from the substrate inlet port into the substrate layer, a substrate fluid outlet channel extending from the substrate outlet port into the substrate layer, and one or more cooling chip fluid channels extending into the semiconductor cooling chip.

First claim

What is claimed is:

1. A semiconductor device stack comprising
a first semiconductor cooling chip coupled to a second semiconductor cooling chip, wherein the first and second semiconductor cooling chips each comprise:
a semiconductor material;
a cooling chip fluid inlet;
a cooling chip fluid outlet; and
one or more cooling chip fluid inlet channels positioned in a recessed region of the semiconductor cooling chips and in fluid communication with the cooling chip fluid inlet and the cooling chip fluid outlet;

a wide bandgap semiconductor device positioned between and thermally coupled to the first and second semiconductor cooling chips;
a first electrode electrically and thermally coupled to the wide bandgap semiconductor device and positioned between the first semiconductor cooling chip and the wide bandgap semiconductor device; and
a second electrode electrically and thermally coupled to the wide bandgap semiconductor device and positioned between the second semiconductor cooling chip and the wide bandgap semiconductor device.

2. The semiconductor device stack of claim 1 , wherein the first electrode comprises a drain electrode and the second electrode comprises a source electrode each thermally and electrically coupled to the wide bandgap semiconductor device such that a vertical current pathway extends through the wide bandgap semiconductor device from the source electrode to the drain electrode.

3. The semiconductor device stack of claim 1 , further comprising a third semiconductor cooling chip comprising:
a semiconductor material;
a cooling chip fluid inlet;
a cooling chip fluid outlet; and
one or more cooling chip fluid inlet channels positioned in a recessed region of the semiconductor cooling chips and in fluid communication with the cooling chip fluid inlet and the cooling chip fluid outlet;
wherein the third semiconductor cooling chip is coupled to the second semiconductor cooling chip such that the second semiconductor cooling chip is positioned between the first and third semiconductor cooling chips.

4. The semiconductor device stack of claim 3 , wherein:
a second wide bandgap semiconductor device positioned between and thermally coupled to the second and third semiconductor cooling chips;
a third electrode electrically and thermally coupled to the second wide bandgap semiconductor device and positioned between the second semiconductor cooling chip and second wide bandgap semiconductor device; and
a fourth electrode electrically and thermally coupled to the second wide bandgap semiconductor device and positioned between the third semiconductor cooling chip and the second wide bandgap semiconductor device.

5. The semiconductor device stack of claim 3 , wherein the cooling chip fluid inlet of the third semiconductor cooling chip is in fluid communication with the cooling chip fluid inlets of the first and second semiconductor cooling chips; and
the cooling chip fluid outlet of the third semiconductor cooling chip is in fluid communication with the cooling chip fluid outlets of the first and second semiconductor cooling chips.

6. The semiconductor device stack of claim 1 , wherein the semiconductor material of the first semiconductor cooling chip and the second semiconductor cooling chip comprises at least one of Si, GaAs, SiC, GaN, AlN, BN and diamond.

7. The semiconductor device stack of claim 1 , wherein the first semiconductor cooling chip and the second semiconductor cooling chip each comprise a gate drive circuit portion electrically coupled to the wide bandgap semiconductor device.

8. The semiconductor device stack of claim 1 , wherein at least a portion of the one or more cooling chip fluid inlet channels comprise a plurality of channel fins extending from the recessed region the semiconductor cooling chips.

9. The semiconductor device stack of claim 1 , wherein at least a portion of the one or more cooling chip fluid inlet channels comprise a plurality of pin fins extending from the recessed region the semiconductor cooling chips.

10. The semiconductor device stack of claim 1 , wherein the wide bandgap semiconductor material of the wide bandgap semiconductor device comprises at least one of SiC, GaN, AlN, BN and diamond.

11. A power electronics assembly comprising:
a substrate layer having a substrate fluid inlet and a substrate fluid outlet; and
a plurality of semiconductor device stacks, wherein each semiconductor device stack comprises:
a first semiconductor cooling chip coupled to a second semiconductor cooling chip, wherein the first and second semiconductor cooling chips each comprise:
a semiconductor material;
a cooling chip fluid inlet;
a cooling chip fluid outlet; and
one or more cooling chip fluid inlet channels positioned in a recessed region of the semiconductor cooling chips and in fluid communication with the cooling chip fluid inlet and the cooling chip fluid outlet;

a wide bandgap semiconductor device positioned between and thermally coupled to the first and second semiconductor cooling chips;
a first electrode electrically and thermally coupled to the wide bandgap semiconductor device and positioned between the first semiconductor cooling chip and the wide bandgap semiconductor device; and
a second electrode electrically and thermally coupled to the wide bandgap semiconductor device and positioned between the second semiconductor cooling chip and the wide bandgap semiconductor device;

wherein:
the cooling chip fluid inlets of each semiconductor device stack are fluidly coupled to the substrate fluid inlet of the substrate layer; and
the cooling chip fluid outlet of each semiconductor device stack are fluidly coupled to the substrate fluid outlet of the substrate layer.

12. The power electronics assembly of claim 11 , further comprising a cap layer coupled to an individual semiconductor cooling chip of the plurality of semiconductor device stacks opposite the substrate layer, wherein the cap layer seals the cooling chip fluid inlet and the cooling chip fluid outlet of the individual semiconductor cooling chip.

13. The power electronics assembly of claim 11 , wherein the first electrode comprises a drain electrode and the second electrode comprises a source electrode each thermally and electrically coupled to the wide bandgap semiconductor device such that a vertical current pathway extends through the wide bandgap semiconductor device from the source electrode to the drain electrode.

14. The power electronics assembly of claim 11 , wherein each semiconductor device stack further comprises a third semiconductor cooling chip positioned opposite the first semiconductor cooling chip such that the second semiconductor cooling chip is positioned between the first and third semiconductor cooling chips, the third semiconductor cooling chip comprising:
a semiconductor material;
a cooling chip fluid inlet;
a cooling chip fluid outlet; and
one or more cooling chip fluid inlet channels positioned in a recessed region of the semiconductor cooling chips and in fluid communication with the cooling chip fluid inlet and the cooling chip fluid outlet;
wherein:
a second wide bandgap semiconductor device is positioned between and thermally coupled to the second and third semiconductor cooling chips;
a third electrode is electrically and thermally coupled to the second wide bandgap semiconductor device and positioned between the second semiconductor cooling chip and second wide bandgap semiconductor device; and
a fourth electrode is electrically and thermally coupled to the second wide bandgap semiconductor device and positioned between the third semiconductor cooling chip

Assignees

• Toyota Eng & Mfg North America
• North America Inc

Inventors

• Fukuoka Yuji
• Dede Ercan M
• Joshi Shailesh N
• Zhou Feng

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/547

  Dispositions of multiple bond wires · CPC title

• H10W72/07554

  changes in dispositions · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title