Photolithography alignment mark, mask and semiconductor wafer containing the same mark
US-9024456-B2 · May 5, 2015 · US
US10192832B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10192832-B2 |
| Application number | US-201615238595-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 16, 2016 |
| Priority date | Aug 16, 2016 |
| Publication date | Jan 29, 2019 |
| Grant date | Jan 29, 2019 |
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An alignment mark structure including a substrate, an alignment mark and at least one dummy pattern is provided. The alignment mark is disposed on the substrate. The at least one dummy pattern is disposed on the substrate and located adjacent to the alignment mark, wherein a size of the at least one dummy pattern is smaller than a size of the alignment mark.
Opening claim text (preview).
What is claimed is: 1. An alignment mark structure, comprising: a substrate; an alignment mark disposed on the substrate; dummy patterns disposed on the substrate and located adjacent to the alignment mark; a first passivation layer covering a top surface of the dummy patterns; and a second passivation layer covering the first passivation layer, wherein a size of the dummy patterns is smaller than a size of the alignment mark, a metal layer of the alignment mark and a metal layer of the dummy patterns are derived from the same metal layer, and the second passivation layer directly contacts and covers entire top surface of the alignment mark, and the first passivation layer does not cover any of the top surface of the alignment mark. 2. The alignment mark structure of claim 1 , wherein the same metal layer is derived from a top metal layer. 3. The alignment mark structure of claim 1 , wherein a material of the same metal layer comprises Al—Cu alloy. 4. The alignment mark structure of claim 1 , wherein a shape of the alignment mark comprises a cross shape or a polygon. 5. The alignment mark structure of claim 4 , wherein the polygon comprises a triangle, a quadrangle, a pentagon or a hexagon. 6. The alignment mark structure of claim 1 , wherein a shape of the dummy patterns comprises a polygon. 7. The alignment mark structure of claim 6 , wherein the polygon comprises a triangle, a quadrangle, a pentagon or a hexagon. 8. The alignment mark structure of claim 1 , wherein the dummy patterns are arranged in a matrix or in a random arrangement. 9. The alignment mark structure of claim 1 , wherein a material of the second passivation layer comprises silicon oxide. 10. The alignment mark structure of claim 1 , wherein a contrast between the alignment mark and the dummy patterns is greater than or equal to 2.5 when performing an alignment process. 11. The alignment mark structure of claim 1 , wherein the alignment mark structure is applied in a package alignment process. 12. The alignment mark structure of claim 1 , wherein the dummy patterns are arranged in only one single layer. 13. An alignment mark structure, comprising: a substrate; an alignment mark disposed on the substrate; at least one dummy pattern disposed on the substrate and located adjacent to the alignment mark, wherein a size of the at least one dummy pattern is smaller than a size of the alignment mark; a first passivation layer covering a top surface of the at least one dummy pattern; and a second passivation layer covering the first passivation layer, wherein the second passivation layer directly contacts and covers entire top surface of the alignment mark, and the first passivation layer does not cover any of the top surface of the alignment mark.
for alignment · CPC title
characterised by the type of information, e.g. logos or symbols · CPC title
the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title
comprising oxides, nitrides or carbides, e.g. ceramics or glasses · CPC title
Marks applied to devices, e.g. for alignment or identification · CPC title
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