Ground-loss detection circuit
US-2015355260-A1 · Dec 10, 2015 · US
US10191107B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10191107-B2 |
| Application number | US-201715440791-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 23, 2017 |
| Priority date | Feb 23, 2017 |
| Publication date | Jan 29, 2019 |
| Grant date | Jan 29, 2019 |
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Failure types that caused defective items to fail testing are identified, the defective items are grouped by the failure types to produce failure-type groups, and the defective items are analyzed to identify defect types that caused the failures. Failure-type limited yield within each of the failure-type groups, and failure-type group-specific defect ratio based on proportions of the defect types within each of the failure-type groups are determined. Additionally, each failure-type group-specific defect ratio is weighted using the failure-type limited yield to produce a weighted failure-type group-specific defect limited yield. For each of the defect types, the weighted failure-type group-specific defect limited yield from each of the failure-type groups is combined to produce the failure-type influenced defect-type total limited yield. Matrix processing is used for the weighting and combination processes. The defect types are ranked based on the failure-type influenced defect-type total limited yield.
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What is claimed is: 1. A method comprising: identifying failure types that caused defective items to fail testing using a processor; grouping the defective items by the failure types to produce failure-type groups using the processor; determining a failure-type limited yield within each of the failure-type groups using the processor; analyzing the defective items to identify defect types that caused failures using defect identification equipment; determining a failure-type group-specific defect ratio based on proportions of the defect types within each of the failure-type groups using the processor; weighting each of the failure-type group-specific defect ratio using the failure-type limited yield, to produce a weighted failure-type group-specific defect limited yield for each of the defect types within each of the failure-type groups using the processor; for each of the defect types, combining the weighted failure-type group-specific defect limited yield from each of the failure-type groups to produce a failure-type influenced defect-type total limited yield for each of defect types using the processor; ranking the defect types based on the failure-type influenced defect-type total limited yield using the processor; and correcting a design of manufactured items used to produce the defective items by fixing a defect with the lowest failure type influenced defect-type total limited yield based on the ranking. 2. The method according to claim 1 , wherein the weighting and the combining are performed by forming a matrix and a vector and applying matrix processing to produce the failure-type influenced defect-type total limited yield, each element of the matrix is a failure-type group-specific defect ratio, and the matrix comprises: the failure-type group-specific defect ratios within a failure type group as a column; and the failure-type group-specific defect ratios for all failure-type groups as a row, the element at column x and row y is the failure-type x group-specific defect type y ratio within failure-type x group; and a natural logarithmic function to each failure type limited yield to create a vector. 3. The method according to claim 2 , wherein the matrix processing further comprises calculating the product of the matrix and the vector to produce a natural logarithmic value of the failure-type influenced defect-type total limited yield, and applying e power function to the natural logarithmic value of the failure-type influenced defect-type total limited yield to produce the failure-type influenced defect-type total limited yield. 4. The method according to claim 3 , wherein the natural logarithmic function comprises: Ln ( LYofDy ) = ∑ x = 1 m ( PofDyforFx ) * Ln ( LYofFx ) ) , where: Ln comprises the natural logarithmic function of the following variables; LY comprises limited yield; Dy comprises defect type y; P comprises proportion; and Fx comprises failure type x. 5. The method according to claim 1 , wherein each of the defect types causes multiple ones of the failure types, and each of the failure types results from multiple ones of the defect types. 6. The method according to claim 1 , wherein the testing comprises electrical testing, and the failure types comprise types of electrical signatures. 7. The method according to claim 1 , wherein the defect types comprise characteristics of manufactured items that diverge from a design of the manufactured items. 8. A method comprising: testing manufactured items for failures to identify defective items using electrical testing equipment; identifying failure types that caused the defective items to fail the testing using a processor; grouping the defective items by the failure types to produce failure-type groups that each has one group-specific failure type using the processor; determining a first ratio of the number of defective items within each of the failure-type groups to the total number of the manufactured items, and subtracting the first ratio from 1, to produce a failure-type limited yield for each of the failure-type groups using the processor; within each failure-type group, of the failure-type groups: analyzing the defective items to identify physical defect types that caused failures using defect identification equipment; for each type of defect, of the physical defect types that caused the group-specific failure type, determining the number of devices that have that type of defect using the processor; and for each type of defect, of the physical defect types that caused the group-specific failure type, determining a second ratio of the number of devices that have that type of defect to the total number of defective items analyzed in the failure-type group, to produce a failure-type group-specific defect ratio using the processor; weighting each of the failure-type group-specific defect ratio using the failure-type limited yield of the failure-type group to produce a weighted failure-type group-specific defect limited yield for each of the physical defect types within the failure-type group using the processor; for each of the physical defect types, combining the weighted failure-type group-specific defect limited yield from each of the failure-type groups to produce a failure-type influenced defect-type total limited yield for each of the physical defect types using the processor; ranking the physical defect types in inverse order to the failure-type influenced defect-type total limited yield using the processor; and correcting a design of the manufactured items used to produce the defective items by fixing a defect with the lowest failure type influenced defect-type total limited yield based on the ranking. 9. The method according to claim 8 , wherein the weighting and the combining are performed by forming a matrix and a vector and applying matrix processing to produce the failure-type influenced defect-type total limited yield, each element of the matrix is a failure-type group-specific defect ratio, and the matrix comprises: the failure-type group-specific defect ratios within a failure type group as a column; and the failure-type group-specific defect ratios for all failure-type groups as a row, the element at column x and row y is the failure-type x group-specific defect type y ratio within failure-type x group; and a natural logarithmic function to each failure type limited yield to create a vector. 10. The method according to claim 9 , wherein the matrix processing further comprises calculating the product of the matrix and the vector to produce a natural logarithmic value of the failure-
Logarithmic or exponential functions · CPC title
Testing of integrated circuits [IC] (G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801) · CPC title
Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)} · CPC title
Aspects of quality control [QC] (G01R31/31718 takes precedence; program control for QC G05B19/41875) · CPC title
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