Reduction of crosstalk between dielectric waveguides using split ring resonators

Patent metadata

Field	Value
Publication number	US-10181628-B2
Application number	US-201615331658-A
Country	US
Kind code	B2
Filing date	Oct 21, 2016
Priority date	Oct 21, 2016
Publication date	Jan 15, 2019
Grant date	Jan 15, 2019

Abstract

Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.

First claim

What is claimed is:

1. A dielectric waveguide layer, comprising:
a first dielectric core forming a first dielectric waveguide;
a second dielectric core forming a second dielectric waveguide;
a cladding disposed between the first and second dielectric cores, wherein a material of the first core has a higher dielectric constant than a material of the cladding; and
a periodic resonator disposed in the cladding between the first and second dielectric cores, the periodic resonator comprising a plurality of resonating structures arranged in an array, wherein each of the plurality of resonating structures is configured to resonate at a common resonant frequency, wherein the plurality of resonating structures are split ring resonators.

2. The dielectric waveguide layer of claim 1 , further comprising:
a first ground layer comprising a first conductive material; and
a second ground layer comprising a second conductive material, wherein the first dielectric core, the second dielectric core, and the cladding are disposed between the first and second ground layers, and wherein the first dielectric core, the second dielectric core, and the cladding directly contact both the first and second ground layers.

3. The dielectric waveguide layer of claim 1 , wherein the split ring resonators each includes a respective annular conductor, wherein respective apertures formed by the respective annular conductors lie on a plane that is parallel with an axis on which the first dielectric core extends through the dielectric waveguide layer.

4. The dielectric waveguide layer of claim 1 , wherein the array has at least two columns and two rows of the plurality of resonating structures.

5. The dielectric waveguide layer of claim 4 , wherein the split ring resonators in neighboring columns in the array are aligned along a first axis that is perpendicular to a second axis on which the first dielectric core extends through the dielectric waveguide layer.

6. The dielectric waveguide layer of claim 1 , wherein a distance between the first and second cores is less than 5 mm.

7. The dielectric waveguide layer of claim 1 , wherein the common resonant frequency is between 10-300 GHz.

8. A multi-layer printed circuit board (PCB), comprising:
a first dielectric core forming a first dielectric waveguide;
a second dielectric core forming a second dielectric waveguide;
a cladding disposed between the first and second dielectric cores, wherein a material of the first core has a higher dielectric constant than a material of the cladding;
a periodic resonator disposed in the cladding between the first and second dielectric cores, the periodic resonator comprising a plurality of resonating structures arranged in an array, wherein each of the plurality of resonating structures is configured to resonate at a common resonant frequency, wherein the array has at least two columns and two rows of the plurality of resonating structures.

9. The multi-layer PCB of claim 8 , further comprising:
a first ground layer comprising a first conductive material; and
a second ground layer comprising a second conductive material, wherein the first dielectric core, the second dielectric core, and the cladding are disposed between the first and second ground layers, and wherein the first dielectric core, the second dielectric core, and the cladding directly contact both the first and second ground layers.

10. The multi-layer PCB of claim 8 , wherein the plurality of resonating structures are split ring resonators.

11. The multi-layer PCB of claim 8 , wherein the plurality of resonating structures each includes a respective annular conductor, wherein respective apertures formed by the respective annular conductors lie on a plane that is parallel with an axis on which the first dielectric core extends through the multi-layer PCB.

12. The multi-layer PCB of claim 8 , wherein the common resonant frequency is between 10-300 GHz.

13. The multi-layer PCB of claim 8 , wherein resonating structures of the plurality of resonating structure in neighboring columns in the array are aligned along a first axis that is perpendicular to a second axis on which the first dielectric core extends through the multi-layer PCB.

14. The multi-layer PCB of claim 8 , wherein a distance between the first and second cores is less than 5 mm.

15. A method, comprising:
transmitting a non-optical electromagnetic signal into a first end of first dielectric core forming a first dielectric waveguide in a dielectric waveguide layer, wherein the dielectric waveguide layer includes a second dielectric core forming a second dielectric waveguide, wherein a cladding is disposed between the first and second dielectric cores, wherein a material of the first core has a higher dielectric constant than a material of the cladding; and
receiving the non-optical electromagnetic signal at a second end of the first dielectric core, wherein a periodic resonator is disposed in the cladding between the first and second dielectric cores, the periodic resonator comprising a plurality of resonating structures arranged in an array, wherein each of the plurality of resonating structures is configured to resonate at a frequency of the non-optical electromagnetic signal to mitigate cross talk between the first dielectric core and the second dielectric core,
wherein the plurality of resonating structures each includes a respective annular conductor, wherein respective apertures formed by the respective annular conductors lie on a plane that is parallel with an axis on which the first dielectric core extends through the dielectric waveguide layer.

16. The method of claim 15 , wherein the plurality of resonating structures are split ring resonators.

17. The method of claim 15 , wherein the dielectric waveguide layer further comprise:
a first ground layer comprising a first conductive material; and
a second ground layer comprising a second conductive material, wherein the first dielectric core, the second dielectric core, and the cladding are disposed between the first and second group layers, and wherein the first dielectric core, the second dielectric core, and the cladding directly contact both the first and second ground layers.

Assignees

• IBM

Inventors

• Dreps Daniel M
• Hejase Jose A
• Myers Joshua C
• Tang Junyan

Classifications

• H01P3/121

  integrated in a substrate · CPC title

• H01P11/006

  Manufacturing dielectric waveguides · CPC title

• H01P3/16 Primary

  Dielectric waveguides, i.e. without a longitudinal conductor · CPC title

• H05K1/0216

  Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title

• H05K1/0298

  Multilayer circuits · CPC title