Magnetoelectric computational devices

Patent metadata

Field	Value
Publication number	US-10164641-B2
Application number	US-201815959698-A
Country	US
Kind code	B2
Filing date	Apr 23, 2018
Priority date	Jul 19, 2016
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

Embodiments of the present invention relate generally to logic devices, and more particularly, to magnetoelectric magnetic tunneling junction computational devices. Aspects of the disclosed technology include a stand-alone voltage-controlled magnetoelectric device that satisfies essential requirements for general logic applications, including nonlinearity, gain, concatenability, feedback prevention, and a complete set of Boolean operations based on the majority gate and inverter. Aspects of the present disclosed technology can eliminate the need for any auxiliary FETs to preset or complicated clocking schemes and prevents the racing condition.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a first input electrode and a ground electrode configured to produce an electric field within a layer of antiferromagnetic material when a voltage is applied to the first input electrode relative to the ground electrode, wherein the layer of antiferromagnetic material produces a magnetic field in response to an application of an electric field;
a first free magnet and a second free magnet, wherein the first and second free magnets are separated by a first isolation layer, wherein the first free magnet is in magnetic communication with the layer of antiferromagnetic material, and wherein the second free magnet is in magnetic communication with the first free magnet;
a first permanent magnet separated from the second free magnet by a second isolation layer;
a first digital voltage electrode in electrical communication with the first permanent magnet; and
an output electrode in electrical communication with the second free magnet.

2. The semiconductor device of claim 1 , wherein the second free magnet is magnetically coupled to the first free magnet;
wherein the first permanent magnet is in contact with the second isolation layer; and
wherein the second free magnet is in contact with the second isolation layer.

3. The semiconductor device of claim 1 further comprising:
a second permanent magnet separated from the second free magnet by a third isolation layer; and
a second digital voltage electrode in electrical communication with the second permanent magnet.

4. The semiconductor device of claim 3 , wherein the second and third isolation layers are portions of the same layer.

5. The semiconductor device of claim 3 , wherein a magnetoresistance between the first digital voltage electrode and ground is different than a magnetoresistance between the second digital voltage electrode and ground depending on the magnetic orientation of the permanent magnets.

6. The semiconductor device of claim 5 , wherein the second permanent magnet is in contact with the third isolation layer; and
wherein the second free magnet is in contact with the third isolation layer.

7. The semiconductor device of claim 5 , wherein the semiconductor device is configured such that a voltage applied to the second digital voltage electrode has a substantially equal magnitude and opposite polarity as a voltage applied to the first digital voltage electrode relative to ground.

8. The semiconductor device of claim 1 , wherein the first input electrode is in electrical communication with the antiferromagnetic layer; and
wherein the ground electrode is in electrical communication with the first free magnet.

9. The semiconductor device of claim 1 , wherein the second free magnet is coupled to the first free magnet by exchange coupling.

10. The semiconductor device of claim 1 , wherein the second free magnet is coupled to the first free magnet by dipole coupling.

11. The semiconductor device of claim 1 further comprising a second input electrode;
wherein the second electrode is configured to produce an electric field within the layer of antiferromagnetic material when a voltage is applied to the second input electrode relative to the ground electrode.

12. The semiconductor device of claim 1 , wherein the first isolation layer has a thickness selected to suppress leakage current from the first digital voltage electrode to the ground electrode.

13. The semiconductor device of claim 1 , wherein the second isolation layer has a thickness selected to permit electron tunneling between the first digital voltage electrode and the output electrode when the polarity of the first permanent magnet and the second free magnet are similarly directed.

14. The semiconductor device of claim 1 , wherein a thickness of the first isolation layer is between approximately two times to three times a thickness of the second isolation layer.

15. The semiconductor device of claim 1 , wherein the first permanent magnet comprises:
a layer comprised, at least in part, of an alloy of cobalt and iron; and
a layer comprised, at least in part, of an alloy of iridium and magnesium.

16. The semiconductor device of claim 1 , wherein the antiferromagnetic layer comprises a material selected from the group consisting of chromium oxide, bismuth ferrite, and combinations thereof.

17. The semiconductor device of claim 1 , wherein the first free magnet comprises a material selected from the group consisting of cobalt iron alloys, cobalt palladium alloys, lanthanum strontium manganite, and combinations thereof.

18. The semiconductor device of claim 1 , wherein the first isolation layer comprises a material selected from the group consisting of magnesium oxide, yttrium-aluminum-garnet, iron oxide, and combinations thereof.

19. The semiconductor device of claim 1 , wherein the second isolation layer comprises a material selected from the group consisting of magnesium oxide, aluminum oxide, and combinations thereof.

20. A semiconductor device comprising:
an input electrode and a ground electrode configured to produce an electric field within a layer of antiferromagnetic material when a voltage is applied to the input electrode relative to the ground electrode, wherein the layer of antiferromagnetic material produces a magnetic field in response to an application of an electric field;
a first free magnet and a second free magnet, wherein the first and second free magnets are separated by a first isolation layer, wherein the first free magnet is in magnetic communication with the layer of antiferromagnetic material, and wherein the second free magnet is magnetically coupled to the first free magnet;
a first permanent magnet in contact with a second isolation layer, wherein the second isolation layer is in contact with the second free magnet;
a second permanent magnet in contact with a third isolation layer, wherein the third isolation layer is in contact with the second free magnet; and
a first digital voltage electrode in electrical communication with the first permanent magnet;
a second digital voltage electrode in electrical communication with the second permanent magnet; and
an output electrode in electrical communication with the second free magnet;
wherein a magnetoresistance between the first digital voltage electrode and ground is different than a magnetoresistance between the second digital voltage electrode and ground depending on the magnetic orientation of the permanent magnets.

Assignees

• Georgia Tech Res Inst

Inventors

• Pan Chenyun
• Dutta Sourav
• Naeemi Azad

Classifications

• H01F10/16

  containing cobalt ({H01F10/126} , H01F10/13 take precedence) · CPC title

• H01L27/22

  Electricity · mapped topic

• H01L43/02

  Electricity · mapped topic

• H01F10/3218

  Exchange coupling of magnetic films via an antiferromagnetic interface (H01F10/3268 takes precedence) · CPC title

• H01L43/10

  Electricity · mapped topic