LED panel

Patent metadata

Field	Value
Publication number	US-10164149-B1
Application number	US-201815960514-A
Country	US
Kind code	B1
Filing date	Apr 23, 2018
Priority date	Jun 27, 2017
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

An LED panel is disclosed. The LED panel includes LED chips and a mount substrate on which the LED chips are mounted by flip bonding. Each of the LED chips includes a sapphire substrate, a plurality of light emitting cells disposed below the sapphire substrate, and an etched portion formed between the plurality of light emitting cells. Each of the LED chips includes a plurality of color cells formed corresponding to the plurality of light emitting cells on the sapphire substrate to change or maintain the color of light from the corresponding light emitting cells and a plurality of light collecting portions formed corresponding to the plurality of light emitting cells and the plurality of color cells on the bottom surface of the substrate and adapted to collect light from the corresponding light emitting cells on the corresponding color cells.

First claim

What is claimed is:

1. An LED panel comprising LED chips and a mount substrate on which the LED chips are mounted wherein each of the LED chips comprises a substrate having a patterned surface, a plurality of light collecting portions, each of which comprises a reflection plane formed on the pattern, and a plurality of light emitting cells which are formed from an epilayer formed on the substrate to cover the plurality of light collecting portions and each of which comprises an active layer and a p-type semiconductor layer on an n-type area comprising the surface of an n-type semiconductor layer, and wherein the plurality of light emitting cells are formed corresponding to the plurality of light collecting portions.

2. The LED panel according to claim 1 , wherein the reflection plane of each of the light collecting portions is formed at a vertical position above the corresponding light emitting cell.

3. The LED panel according to claim 1 , wherein a first electrode pad is formed on the p-type semiconductor layer of each of the plurality of light emitting cells and a second electrode pad is formed on the n-type semiconductor layer in an n-type edge area surrounding the plurality of light emitting cells.

4. The LED panel according to claim 3 , further comprising a passivation layer formed to cover the lateral sides of the plurality of light emitting cells.

5. The LED panel according to claim 1 , wherein the pattern comprises recesses whose cross-section is V-shaped.

6. The LED panel according to claim 1 , further comprising a plurality of color cells formed on the surface of the substrate opposite the patterned surface thereof and corresponding to the plurality of light emitting cells.

7. The LED panel according to claim 6 , wherein the LED chip further comprises a light shielding layer comprising a plurality of cell holes on the surface of the substrate opposite the patterned surface thereof and light transmitting materials filled in the plurality of cell holes, and wherein the light transmitting materials comprise wavelength converting light transmitting materials.

8. The LED panel according to claim 6 , wherein the plurality of color cells comprise groups of a first color cell, a second color cell, and a third color cell arranged adjacent to one another and two or more of the first color cell, the second color cell, and the third color cell convert the wavelengths of light from the corresponding light emitting cells to output light of different colors.

9. The LED panel according to claim 1 , wherein each of the plurality of light collecting portions comprises a lens profile formed to collect light from the corresponding light emitting cell on the corresponding color cell and comprising a portion of a gallium nitride epilayer grown on the pattern formed on the bottom surface of the substrate.

10. The LED panel according to claim 9 , wherein the lens profile further comprises a low refractive index material previously filled in the pattern before a gallium nitride epilayer is formed on the bottom surface of the substrate.

11. The LED panel according to claim 1 , wherein the reflection planes are formed by filling a reflective material in the pattern.

12. The LED panel according to claim 1 , wherein the plurality of light emitting cells are defined by an etched portion.

13. The LED panel according to claim 1 , wherein the reflection planes are formed by filling a reflective material in the pattern and the plurality of light emitting cells are defined by an etched portion.

14. The LED panel according to claim 13 , wherein the reflective material corresponds to the etched portion.

15. The LED panel according to claim 14 , wherein the reflection planes are formed at vertical positions above the etched portion.

16. The LED panel according to claim 1 , wherein the plurality of light emitting cells are defined by an etched portion and the reflection planes formed on the pattern of the substrate correspond to the etched portion.

17. A method for producing an LED panel comprising preparing LED chips and mounting the LED chips on a mount substrate wherein the LED chips are prepared by providing a substrate having a first surface and a second surface opposite to each other, patterning the first surface of the substrate, and filling a reflective material in the pattern to form a plurality of light collecting portions, each of which comprises a reflection plane surrounding a plurality of reflecting areas, and wherein an epilayer comprising an n-type semiconductor layer, an active layer, and a p-type semiconductor layer is formed on the first surface of the substrate so as to cover the plurality of light collecting portions and is etched to form a plurality of light emitting cells, each of which at least comprises the active layer and the p-type semiconductor layer on an n-type area comprising the surface of the n-type semiconductor layer, such that the plurality of light emitting cells correspond to the plurality of light collecting portions.

18. The method according to claim 17 , wherein each of the plurality of light collecting portions comprises a reflection plane formed at a vertical position above the corresponding light emitting cell.

19. The method according to claim 17 , wherein a plurality of color cells corresponding to the plurality of light emitting cells are formed on the second surface of the substrate.

20. The method according to claim 19 , wherein the plurality of color cells are formed by forming a light shielding layer comprising a plurality of cell holes on the second surface of the substrate and filling wavelength converting light transmitting materials and/or a non-wavelength converting light transmitting material in the plurality of cell holes.

Assignees

• Lumens Co Ltd

Inventors

• Yoo Taekyung
• Kim Daewon
• Won Yelim

Classifications

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H01L33/12

  Electricity · mapped topic

• H01L24/17

  Electricity · mapped topic

• H01L33/50

  Electricity · mapped topic

• H01L33/08 Primary

  Electricity · mapped topic