Helical plated through-hole package inductor

Patent metadata

Field	Value
Publication number	US-10163557-B2
Application number	US-201514973115-A
Country	US
Kind code	B2
Filing date	Dec 17, 2015
Priority date	Dec 17, 2015
Publication date	Dec 25, 2018
Grant date	Dec 25, 2018

Abstract

Devices and methods including a though-hole inductor for an electronic package are shown herein. Examples of the through-hole inductor include a substrate including at least one substrate layer. Each substrate layer including a dielectric layer having a first surface and a second surface. An aperture included in the dielectric layer is located from the first surface to the second surface. The aperture includes an aperture wall from the first surface to the second surface. A conductive layer is deposited on the first surface, second surface, and the aperture wall. At least one coil is cut from the conductive layer and located on the aperture wall.

First claim

The claimed invention is:

1. An electronic package including a through-hole inductor comprising:
a substrate including at least one substrate layer, each substrate layer including a dielectric layer having a first surface and a second surface;
an aperture in the dielectric layer located from the first surface to the second surface, the aperture including an aperture wall extended from the first surface to the second surface;
a conductive layer on the first surface, second surface, and the aperture wall;
a die coupled to the substrate and electrically coupled with the conductive layer; and
an integrated voltage regulator (IVR) including:
at least one coil cut from the conductive layer, the at least one coil located on the aperture wall from the first surface to the second surface and on at least one of the first and second surface, wherein the at least one coil is configured to generate an electro-magnetic flux,
a magnetic core disposed in physical contact with the aperture wall, the coil, and the dielectric layer between segments of the coil, and
at least one capacitor or resistor located on the die.

2. The electronic package of claim 1 , wherein the magnetic core includes magnetic particles suspended within a carrier, the magnetic core including flux, polymer, or epoxy material with magnetic particles suspended therein.

3. The electronic package of claim 2 , wherein the magnetic core includes magnetic nanoparticles.

4. The electronic package of claim 1 , wherein the substrate includes a second substrate layer, the second substrate layer can include a secondary conductive layer, the secondary conductive layer includes at least one electrical contact configured for electrical communication.

5. The electronic package of claim 4 , wherein the substrate includes a substrate core and at least one second substrate layer includes a sequential layer build-up.

6. The electronic package of claim 1 , wherein the IVR includes a buck converter circuit.

7. The electronic package of claim 1 , wherein the at least one coil includes a helical shape.

8. The electronic package of claim 1 , wherein the at least one coil is located within the substrate above or beneath the die.

9. The electronic package of claim 1 , wherein the magnetic core is disposed on the aperture wall at a location above and below the coil along a longitudinal axis of the aperture.

Assignees

• Intel Corp

Inventors

• Lambert William J
• Roy Mihir K
• Manusharow Mathew J
• Deng Yikang

Classifications

• H01F17/0033

  with the coil helically wound around a magnetic core · CPC title

• C25D5/48

  After-treatment of electroplated surfaces · CPC title

• H01F41/0206

  Manufacturing of magnetic cores by mechanical means (magnetic cores per se H01F27/24) · CPC title

• H01F17/0013

  with stacked layers · CPC title

• H01F27/2804 Primary

  Printed windings · CPC title