Circuit for stabilizing a digital-to-analog converter reference voltage
US-9800258-B2 · Oct 24, 2017 · US
US10156596B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10156596-B2 |
| Application number | US-201615375092-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 11, 2016 |
| Priority date | Dec 10, 2015 |
| Publication date | Dec 18, 2018 |
| Grant date | Dec 18, 2018 |
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A method for measuring a voltage using a capacitive voltage divider (CVD) and an analog-to-digital converter includes the steps of measuring a bandgap or reference voltage and determining a first code value of the bandgap or reference voltage, charging a first capacitor to a voltage to be measured and determining a second code value of voltage of the first capacitor, charging a second capacitor to a second known voltage and determining a third code value of voltage of the second capacitor, and determining the voltage to be measured by applying the first, second, and third code values.
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The invention claimed is: 1. A capacitive voltage divider (CVD) method for measuring a voltage using a capacitor, an analog-to-digital converter (ADC) comprising a sample and hold capacitor and a control circuit, comprising the steps of: measuring a bandgap or reference voltage by the ADC and determining a first code value of the bandgap or reference voltage; performing a first CVD measurement through the control circuit by charging the capacitor to a voltage to be measured and coupling the charged capacitor with a sample & hold capacitor of the ADC to perform a CVD measurement thereby determining a second code value; performing a second CVD measurement through the control circuit by charging the capacitor to a known second voltage coupling the charged capacitor with a sample & hold capacitor of the ADC to perform a CVD measurement thereby and determining a third code value; and determining by the control circuit the voltage to be measured by applying the first, second, and third code values. 2. The method of claim 1 , wherein the bandgap voltage is 1.2V. 3. The method of claim 1 , wherein N=4096. 4. The method of claim 1 , wherein the steps are performed by a control and calculation circuitry. 5. The method of claim 1 , wherein performing analog to digital conversion to find the voltage to be measured produces no quiescent current. 6. The method of claim 1 , wherein the step of determining the voltage to be measured comprises the step of calculating Vbg*2 N *Cy/(Cz*Cx), wherein Vbg represents the bandgap or reference voltage, N represents the number of bits of the ADC, Cx represents the first code value, Cy represents the second code value, and Cz represents the third code value. 7. The method of claim 1 , wherein the known second voltage is a supply voltage. 8. A voltage measurement circuit, comprising: a capacitive voltage divider (CVD) measurement circuit comprising a capacitor, a switching circuit and an analog-to-digital converter (ADC); and a control circuit configured to: measure, by the ADC, a bandgap or reference voltage thereby determining a first code value; charge the capacitor to a voltage to be measured and couple the charged capacitor with a sample & hold capacitor of the ADC to perform a CVD measurement thereby determining, by the ADC, a second code value; charge the capacitor to a known second voltage and couple the charged capacitor with a sample & hold capacitor of the ADC to perform a CVD measurement thereby determining, by the ADC, a third code value; and determine the voltage to be measured by applying the first, second, and third code values. 9. The voltage measurement circuit of claim 8 , wherein the bandgap voltage is 1.2V. 10. The voltage measurement circuit of claim 9 , wherein N=4096. 11. The voltage measurement circuit of claim 8 , wherein the CVD measurement circuit comprises a parasitic capacitance. 12. The voltage measurement circuit of claim 8 , wherein performing the analog to digital conversion produces no quiescent current. 13. The voltage measurement circuit of claim 8 , wherein for determining the voltage the control circuit is configured to calculate Vbg*2 N *Cy/(Cz*Cx), wherein Vbg represents the bandgap or reference voltage, N represents the number of bits of the ADC ( 110 ), Cx represents the first code value, Cy represents the second code value, and Cz represents the third code value. 14. The voltage measurement circuit of claim 8 , wherein the known second voltage is a supply voltage. 15. A microcontroller, comprising: a capacitive voltage divider (CVD) measurement circuit comprising a capacitor, a switching circuit and an analog-to-digital converter (ADC); and a control circuit configured to: measure, with the ADC, a bandgap or reference voltage thereby determining a first code value; charge the capacitor to a voltage to be measured and couple the charged capacitor with a sample & hold capacitor of the ADC to perform a CVD measurement thereby determining, with the ADC, a second code value; charge the capacitor to a known second voltage and couple the charged capacitor with a sample & hold capacitor of the ADC to perform a CVD measurement thereby determining, with the ADC, a third code value; and determine the voltage to be measured by applying the first, second, and third code values. 16. The microcontroller of claim 15 , wherein the bandgap voltage is 1.2V. 17. The microcontroller of claim 15 , wherein N=4096. 18. The microcontroller of claim 15 , wherein the CVD measurement circuit comprises a parasitic capacitance. 19. The microcontroller of claim 15 , wherein performing the analog to digital conversion produces no quiescent current. 20. The microcontroller of claim 15 , wherein for determining the voltage the control circuit is configured to calculate Vbg*2 N *Cy/(Cz*Cx), wherein Vbg represents the bandgap or reference voltage, N represents the number of bits of the ADC ( 110 ), Cx represents the first code value, Cy represents the second code value, and Cz represents the third code value. 21. The microcontroller of claim 15 , wherein the known second voltage is a supply voltage.
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