Method for sensing memory element coupled to selector device

US10153017B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10153017-B2
Application numberUS-201615264847-A
CountryUS
Kind codeB2
Filing dateSep 14, 2016
Priority dateSep 14, 2016
Publication dateDec 11, 2018
Grant dateDec 11, 2018

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  5. First independent claim

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Abstract

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The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal selector element in series. The method includes the steps of raising a cell voltage across the memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and measuring a first sensing current passing through the memory cell, the selector element being nominally conductive irrespective of the resistance state of the MTJ memory element at the first sensing voltage; and further decreasing the cell voltage to a second sensing voltage and measuring a second sensing current, the selector element being nominally conductive if the MTJ memory element is in the low resistance state or nominally insulative if the MTJ memory element is in the high resistance state at the second sensing voltage.

First claim

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What is claimed is: 1. A method for sensing a resistance state of a magnetic tunnel junction (MTJ) memory element in a magnetic memory cell that further includes a two-terminal selector element coupled to the MTJ memory element in series, the MTJ memory element having a high resistance mode and a low resistance mode, the two-terminal selector element having an on-state that is conductive and an off-state that is insulative, the method comprising the steps of: turning on the selector element by raising a cell voltage across the magnetic memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and measuring a first sensing current passing through the magnetic memory cell, the two-terminal selector element being conductive irrespective of the resistance state of the MTJ memory element at the first sensing voltage; and further decreasing the cell voltage to a second sensing voltage and measuring a second sensing current passing through the magnetic memory cell, the two-terminal selector element being conductive if the MTJ memory element is in the low resistance mode or insulative if the MTJ memory element is in the high resistance mode at the second sensing voltage, calculating a difference between the first sensing current and the second sensing current; comparing the difference to a reference value; concluding the MTJ memory element is in the high resistance mode if the difference is greater than the reference value; and concluding the MTJ memory element is in the low resistance mode if the difference is less than the reference value. 2. A method for sensing a resistance state of a magnetic tunnel junction (MTJ) memory element in a magnetic memory cell that further includes a two-terminal selector element coupled to the MTJ memory element in series, the MTJ memory element having a high resistance mode and a low resistance mode, the two-terminal selector element having an on-state that is conductive and an off-state that is insulative, the method comprising the steps of: turning on the selector element by raising a cell voltage across the magnetic memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and measuring a first sensing current passing through the magnetic memory cell, the two-terminal selector element being conductive irrespective of the resistance state of the MTJ memory element at the first sensing voltage; and further decreasing the cell voltage to a second sensing voltage and measuring a second sensing current passing through the magnetic memory cell, the two-terminal selector element being conductive if the MTJ memory element is in the low resistance mode or insulative if the MTJ memory element is in the high resistance mode at the second sensing voltage, calculating a slope between a first point defined by the first sensing voltage and the first sensing current and a second point defined by the second sensing voltage and the second sensing current; comparing the slope to a reference slope value; concluding the MTJ memory element is in the high resistance mode if the slope is greater than the reference slope value; and concluding the MTJ memory element is in the low resistance mode if the slope is less than the reference slope value. 3. The method claim 1 , further comprising the step of measuring a third sensing current at a third sensing voltage between the first and second sensing voltages. 4. The method claim 1 , further comprising the steps of measuring multiple sensing currents at multiple sensing voltage between the first and second sensing voltages. 5. The method of claim 1 , wherein a resistance ratio of the high resistance mode to the low resistance mode of the MTJ memory element is between 2 to 4. 6. The method of claim 1 , wherein a resistance ratio of the high resistance mode to the low resistance mode of the MTJ memory element is between 1.5 to 5. 7. The method of claim 1 , wherein the MTJ memory element includes: a magnetic free layer having a variable magnetization direction perpendicular to a layer plane thereof; a magnetic reference layer having a first invariable magnetization direction perpendicular to a layer plane thereof; a tunnel junction layer interposed between the magnetic free layer and the magnetic reference layer; a magnetic fixed layer having a second invariable magnetization direction opposite to the first invariable magnetization direction; and an anti-ferromagnetic coupling layer interposed between the magnetic reference layer and the magnetic fixed layer. 8. The method claim 2 , further comprising the step of measuring a third sensing current at a third sensing voltage between the first and second sensing voltages. 9. The method claim 2 , further comprising the steps of measuring multiple sensing currents at multiple sensing voltage between the first and second sensing voltages. 10. The method of claim 2 , wherein a resistance ratio of the high resistance mode to the low resistance mode of the MTJ memory element is between 2 to 4. 11. The method of claim 2 , wherein a resistance ratio of the high resistance mode to the low resistance mode of the MTJ memory element is between 1.5 to 5. 12. The method of claim 2 , wherein the MTJ memory element includes: a magnetic free layer having a variable magnetization direction perpendicular to a layer plane thereof; a magnetic reference layer having a first invariable magnetization direction perpendicular to a layer plane thereof; a tunnel junction layer interposed between the magnetic free layer and the magnetic reference layer; a magnetic fixed layer having a second invariable magnetization direction opposite to the first invariable magnetization direction; and an anti-ferromagnetic coupling layer interposed between the magnetic reference layer and the magnetic fixed layer.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Cell access · CPC title

  • Electricity · mapped topic

  • details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

  • Reading or sensing circuits or methods · CPC title

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What does patent US10153017B2 cover?
The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal selector element in series. The method includes the steps of raising a cell voltage across the memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and …
Who is the assignee on this patent?
Avalanche Technology Inc
What technology area does this patent fall under?
Primary CPC classification G11C11/1673. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).