Structure and formation method of semiconductor device structure with a dummy fin structure

Patent metadata

Field	Value
Publication number	US-10147805-B2
Application number	US-201514815349-A
Country	US
Kind code	B2
Filing date	Jul 31, 2015
Priority date	Jul 31, 2015
Publication date	Dec 4, 2018
Grant date	Dec 4, 2018

Abstract

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a first fin structure over a semiconductor substrate. The semiconductor device structure also includes a second fin structure over the semiconductor substrate. The second fin structure has a lower height than that of the first fin structure. The second fin structure includes a first sidewall and a second sidewall, and the first sidewall and the second sidewall surround a recess over the second fin structure.

First claim

What is claimed is:

1. A method for forming a semiconductor device structure, comprising:
forming a first fin structure and a second fin structure over a semiconductor substrate;
forming a hard mask over the first fin structure and the second fin structure;
forming a mask layer covering the hard mask, the first fin structure and the second fin structure;
irradiating the mask layer so that the mask layer is divided into an unirradiated portion surrounding the first fin structure and an irradiated portion surrounding the second fin structure;
performing a first etching operation using the second fin structure as an etch stop layer to remove the hard mask over the second fin structure, and partially remove the mask layer such that the etch stop layer protrudes from the irradiated portion of the mask layer after the first etching operation, wherein the irradiated portion and the unirradiated portion have different etching rates during the first etching operation; and
partially removing the second fin structure using a second etching operation after the first etching operation, wherein an etching rate of the second etching operation to the second fin structure is higher than an etching rate of the first etching operation to the second fin structure,
wherein the first fin structure and the hard mask over the first fin structure remain covered by the unirradiated portion of the mask layer during and after the first etching operation using the second fin structure as the etch stop layer.

2. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the etching rate of the second etching operation to the second fin structure is higher than an etching rate of the second etching operation to the irradiated portion of the mask layer.

3. The method for forming a semiconductor device structure as claimed in claim 1 , further comprising:
applying a developing solution on the mask layer after the irradiating of the mask layer, wherein the first etching operation is performed after the applying of the developing solution, and wherein an etching rate of the first etching operation to the irradiated portion is higher than an etching rate of the first etching operation to the unirradiated portion.

4. The method for forming a semiconductor device structure as claimed in claim 1 , wherein an etching rate of the second etching operation to the irradiated portion is higher than an etching rate of the second etching operation to the unirradiated portion.

5. The method for forming a semiconductor device structure as claimed in claim 1 , wherein an operation power used for performing the second etching operation is less than an operation power used for performing the first etching operation.

6. The method for forming a semiconductor device structure as claimed in claim 1 , further comprising forming an isolation feature over the semiconductor substrate to surround a lower portion of the first fin structure and cover a top surface of the second fin structure.

7. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the second fin structure is made of a semiconductor material, and the first etching operation is performed using the semiconductor material as the etch stop layer to partially remove the mask layer.

8. The method for forming a semiconductor device structure as claimed in claim 1 , further comprising forming a plurality of first fin structures and a plurality of second fin structures over the semiconductor substrate, wherein a first interval between the first fin structures is different from a second interval between the second fin structures, and the mask layer fills the first interval and the second interval.

9. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the first sidewall and the second sidewall have different heights after the second etching operation.

10. A method for forming a semiconductor device structure, comprising:
forming a first fin structure and a second fin structure;
forming a first hard mask over the first fin structure;
forming a second hard mask over the second fin structure;
funning a mask layer covering the first hard mask, the second hard mask, the first fin structure and the second fin structure;
irradiating the mask layer so that the mask layer is divided into an unirradiated portion and an irradiated portion which surrounds the second fin structure;
performing a first etching operation over the mask layer using the second fin structure as an etch stop layer such that the second hard mask is removed, and the etch stop layer protrudes from the irradiated portion of the mask layer after the first etching operation, wherein the irradiated portion and the unirradiated portion have different etching rates during the first etching operation, and wherein a first etching rate of the first etching operation to the irradiated portion of the mask layer is higher than a second etching rate of the first etching operation to the second fin structure; and
performing a second etching operation after the first etching operation, wherein a third etching rate of the second etching operation to the second fin structure is higher than the second etching rate,
wherein the first fin structure and the first hard mask over the first fin structure remain covered by the unirradiated portion of the mask layer during and after the first etching operation using the second fin structure as the etch stop layer.

11. The method for forming a semiconductor device structure as claimed in claim 10 , wherein the third etching rate is higher than a fourth etching rate of the second etching operation to the irradiated portion of the mask layer.

12. The method for forming a semiconductor device structure as claimed in claim 10 , wherein the first etching rate is higher than a fifth etching rate of the first etching operation to the unirradiated portion of the mask layer and a sixth etching rate of the second etching operation to the unirradiated portion.

13. The method for forming a semiconductor device structure as claimed in claim 10 , wherein the method does not comprise performing a photolithography process between the first etching operation and the second etching operation.

14. The method for forming a semiconductor device structure as claimed in claim 10 , wherein a profile of a top surface of the second fin structure changes during the first etching operation.

15. The method for forming a semiconductor device structure as claimed in claim 10 , wherein a profile of a top surface of the second fin structure changes during the second etching operation.

16. The method for forming a semiconductor device structure as claimed in claim 10 , wherein a top surface of the second fin structure becomes sunken during the second etching operation, and the second fin structure comprises a first sidewall, a second sidewall opposite to the first sidewall, and a center between the first sidewall and the second sidewall, and wherein the second fin structure gradually becomes shorter from the first sidewall and the second sidewall to the center.

17. A method for forming a semiconductor device structure, comprising:
forming a dummy fin structure and a fin structure;
forming a hard mask over the dummy fin structure and the fin structure;
forming a mask layer covering and surrounding the hard mask, the dummy fin structure, and the fin structure;
irradiating the mask layer so that the mask layer is divided into an unirradiated portion and an irradiated portion which surrounds the dummy fin structure;
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Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Lung
• Kuo Kang-Min
• Chan Wen-Hsin

Classifications

• H10W10/0145

  of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence) · CPC title

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H01L29/0653

  Electricity · mapped topic

• H01L29/7851

  Electricity · mapped topic

• H01L21/76232

  Electricity · mapped topic