Method and system for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or features

US10141227B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10141227-B1
Application numberUS-201715649799-A
CountryUS
Kind codeB1
Filing dateJul 14, 2017
Priority dateJul 14, 2017
Publication dateNov 27, 2018
Grant dateNov 27, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Methods and systems for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or features are disclosed herein. In one example embodiment, a system includes a processing device that includes first, second, and third circuitry. The first circuitry is configured to generate control signals that at least indirectly cause a pick and place head mechanism to attempt to pick up and place at least some of first and second dice. The second circuitry is configured to assess whether attempts to implement one or more of first and second dice should be skipped based upon wafer map information. Further, the third circuitry is configured to determine whether a second position of a first one of the second dice is sufficiently proximate to a first position so that it would be appropriate to implement the first one of the second dice.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of achieving at least one part of a semiconductor system having matched or similar components, the method comprising: directing a pick and place head mechanism, by way of a processing device associated with an assembly machine, to move to a first position at a first column of a first row of a singulated semiconductor wafer having a plurality of rows including the first row and a plurality of columns including a first set of columns each including a plurality of first dice of a first type and a second set of columns each including a plurality of second dice of a second type, the first set of columns including the first column; directing the pick and place head mechanism to implement a first one of the first dice from the first position at a first location on one or more substrates, wherein the first one of the first dice includes a first component; determining whether the first one of the first dice was implemented at the first location as directed; subsequent to determining that the first one of the first dice was implemented at the first location as directed, determining that a first one of the second dice is present at a second position at a second column that is also within the first row and that satisfies a proximity criterion indicative of a maximum distance on the wafer that can separate matched or similar dice, the second set of columns including the second column; and upon determining that the first one of the second dice is present at the second position at the second column that satisfies the proximity criterion, directing the pick and place head mechanism to implement the first one of the second dice from the second position at the second location, wherein the first one of the second dice includes a second component that is matched or similar to the first component due to the first and second type being matched or similar; wherein, upon the first one of the first dice and the first one of the second dice being implemented on the one or more substrates, the one or more substrates constitutes or constitute the at least one part of the semiconductor system having the matched or similar components, the matched or similar components including the first and second components. 2. The method of claim 1 , further comprising: directing the pick and place head mechanism to implement a second one of the second dice from a third position at a third column of the first row to the second location on the one or more substrates, the second set of columns including the third column, wherein the determining that the first one of the second dice is present at the second position occurs after a determination that the second one of the second dice was not implemented at the second location as directed. 3. The method of claim 2 , further comprising, subsequent to the determination that the second one of the second dice was not implemented at the second location as directed, and prior to the determining that the first one of the second dice is present at the second position that satisfies the proximity criterion: determining that a third one of the second dice is present at a fourth position at a fourth column that is also within the first row and that satisfies the proximity criterion; directing the pick and place head mechanism to implement the third one of the second dice from the fourth position at the second location on the one or more substrates; and determining that the third one of the second dice was not implemented at the second location as directed. 4. The method of claim 2 , further comprising: upon determining that either the second position or a fourth position is at or proximate to an edge of the wafer, directing the pick and place head mechanism to move to a fifth position at a first column of a second row. 5. The method of claim 4 , further comprising: directing the pick and place head mechanism to implement a second one of the first dice from a sixth position at a fourth column of the first row at a third location on a first substrate of the one or more substrates, or a second substrate of the one or more substrates; determining that the second one of the first dice was implemented at the third location as directed; upon determining that the second one of the first dice was implemented at the third location as directed, directing the pick and place head mechanism to implement a third one of the second dice from the fourth position at a fourth location on the first substrate or the second substrate; wherein subsequently the pick and place head mechanism is directed to move to the fifth position when the fourth position is determined to be at or proximate to the edge of the wafer, and correspondingly the second of the first dice is discarded. 6. The method of claim 2 , wherein the third column is to the right of the first column in the first row, wherein the second column is to the right of the third column in the first row, wherein, if a left-to-right axis on the wafer is considered a horizontal axis and an additional axis perpendicular to the left-to-right axis is considered a vertical axis, then the second row extends, below the first row, parallel to the first row, and wherein a succession of directions to the pick and place head mechanism concerning movements within the first and second rows cause the pick and place head mechanism to follow a substantially Z-shaped path across the wafer. 7. The method of claim 1 , further comprising: directing the pick and place head mechanism to implement a second one of the first dice from a third position at a third column of the first row at a third location on a first substrate of the one or more substrates, or a second substrate of the one or more substrates; upon determining that the second one of the first dice was not implemented at the third location as directed, discarding a second one of the second dice that is present at a fourth position at a fourth column of the first row that is neighboring the third column, and additionally either: directing the pick and place head mechanism to implement a third one of the first dice from a fifth position at a fifth column of the first row; or upon determining that either the third position or the fourth position is at or proximate to an edge of the wafer, directing the pick and place head mechanism to move to a sixth position at a first column of a second row. 8. The method of claim 1 , further comprising: directing the pick and place head mechanism to implement a second one of the first dice from a third position at a third column of the first row at a third location on a first substrate of the one or more substrates, or a second substrate of the one or more substrates; and upon determining that the second one of the first dice was implemented at the third location as directed, further determining that a third one of the second dice that is present at a fourth position at a fourth column that is also within the first row fails to satisfy the proximity criterion and causing the second one of the first dice to be discarded. 9. The method of claim 1 , further comprising: receiving the wafer from a wafer probe system; and receiving a wafer map from the wafer probe system, the wafer map specifying which of the first dice and the second dice are suitable for being implemented, and wherein the second column is either to the right of the first column or to the left of the first column as determined relative to the first row. 10. The method of claim 1 , wherein the plurality of columns additionally includes at least one additional set of columns, wherein each additional set of columns has a respective additional plurality of additional dice of a respective additional type

Assignees

Inventors

Classifications

  • Pick-and-place heads or apparatus, e.g. with jaws · CPC title

  • Position monitoring, e.g. misposition detection or presence detection · CPC title

  • Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates · CPC title

  • for positioning, orientation or alignment · CPC title

  • Located in dummy chips or in reference chips · CPC title

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What does patent US10141227B1 cover?
Methods and systems for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or features are disclosed herein. In one example embodiment, a system includes a processing device that includes first, second, and third circuitry. The first circuitry is configured to generate control signals that at least indirectly cause a …
Who is the assignee on this patent?
Nxp Usa Inc
What technology area does this patent fall under?
Primary CPC classification H10P72/0446. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).