Microelectronic device attachment on a reverse microelectronic package

Patent metadata

Field	Value
Publication number	US-10136516-B2
Application number	US-201715607612-A
Country	US
Kind code	B2
Filing date	May 29, 2017
Priority date	Mar 13, 2012
Publication date	Nov 20, 2018
Grant date	Nov 20, 2018

Abstract

The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate have an opening, wherein the opening may be formed through the microelectronic substrate or may be a recess formed in the microelectronic substrate. A microelectronic package may be attached to the microelectronic substrate, wherein the microelectronic package may include an interposer having a first surface and an opposing second surface. A microelectronic device may be attached to the interposer first surface and the interposer may be attached to the microelectronic substrate by the interposer first surface such that the microelectronic device extends into the opening. At least one secondary microelectronic device may be attached to the interposer second surface.

First claim

What is claimed is:

1. A method of forming a microelectronic structure, comprising:
forming a microelectronic substrate having a first surface, a second surface, and an opening extending from the microelectronic substrate first surface and the microelectronic substrate second surface;
forming a microelectronic package comprising forming a microelectronic interposer having a first surface and electrically attaching at least two microelectronic devices to the first surface of the microelectronic interposer;
electrically attaching the microelectronic interposer first surface to the microelectronic substrate first surface, wherein the at least two microelectronic devices extend at least partially into the microelectronic substrate opening; and
thermally contacting a heat dissipation device with the at least two microelectronic devices, wherein the heat dissipation device comprises a heat spreader coupled to a heat pipe, wherein at least a portion of the heat spreader extends into the microelectronic substrate opening, and wherein the heat pipe is external to the microelectronic substrate opening and extends over the microelectronic substrate second surface.

2. The method of claim 1 , further including electrically attaching at least one secondary microelectronic device to a second surface of the microelectronic interposer.

3. The method of claim 2 , wherein electrically attaching the at least two microelectronic devices to the first surface of the microelectronic interposer comprises electrically attaching a microprocessor to the first surface of the microelectronic interposer, and wherein electrically attaching the at least one secondary microelectronic device to the second surface of the microelectronic interposer comprises electrically attaching at least one memory device to the second surface of the microelectronic interposer.

4. The method of claim 1 , further comprising incorporating at least a portion of the heat spreader into the microelectronic substrate.

5. The method of claim 1 , further comprising attaching at least one passive device to a second surface of the microelectronic interposer.

6. The method of claim 1 , further comprising abutting the heat spreader to the microelectronic substrate within the microelectronic substrate opening.

7. The method of claim 1 , further comprising attaching the heat spreader to the microelectronic substrate within the microelectronic substrate opening.

8. The method of claim 1 , further comprising attaching at least one additional microelectronic device to the first surface of the microelectronic substrate.

9. The method of claim 1 , further comprising attaching at least one additional microelectronic device to the second surface of the microelectronic substrate.

10. A microelectronic system, comprising:
a housing; and
a microelectronic structure disposed within the housing, comprising:
a microelectronic substrate having a first surface, a second surface, and an opening extending from the microelectronic substrate first surface and the microelectronic substrate second surface; and
a microelectronic package comprising a microelectronic interposer having at least two microelectronic devices electrically attached to a first surface of the microelectronic interposer, wherein the microelectronic package is electrically attached to the microelectronic substrate first surface by the microelectronic interposer first surface and wherein the at least two microelectronic devices extend at least partially into the microelectronic substrate opening; and
a heat dissipation device in thermal contact with the at least two microelectronic devices, wherein the heat dissipation device comprises a heat spreader coupled to a heat pipe, wherein at least a portion of the heat spreader extends into the microelectronic substrate opening, and wherein the heat pipe is external to the microelectronic substrate opening and extends over the microelectronic substrate second surface.

11. The microelectronic system of claim 10 , wherein the microelectronic package further includes at least one secondary microelectronic device attached to a second surface of the microelectronic interposer.

12. The microelectronic system of claim 11 , wherein the at least two microelectronic devices comprises a microprocessor and wherein the at least one secondary microelectronic device comprises a memory device.

13. The microelectronic system of claim 10 , wherein at least a portion of the heat dissipation device is incorporated into the microelectronic substrate.

14. The microelectronic system of claim 10 , further including at least one passive device attached to a second surface of the microelectronic interposer.

15. The microelectronic system of claim 10 , further comprising abutting the heat spreader to the microelectronic substrate within the microelectronic substrate opening.

16. The microelectronic system of claim 10 , further comprising attaching the heat spreader to the microelectronic substrate within the microelectronic substrate opening.

17. The microelectronic system of claim 10 , further comprising attaching at least one additional microelectronic device to the first surface of the microelectronic substrate.

18. The microelectronic system of claim 10 , further comprising attaching at least one additional microelectronic device to the second surface of the microelectronic substrate.

Assignees

• Intel Corp

Inventors

• Loo Howe Yin
• Chee Choong Kooi

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/721

  of bump connectors · CPC title

• H10W72/07251

  characterised by changes in properties of the bump connectors during connecting · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title