Three-dimensional memory device having epitaxial germanium-containing vertical channel and method of making thereof

Patent metadata

Field	Value
Publication number	US-10121794-B2
Application number	US-201615279959-A
Country	US
Kind code	B2
Filing date	Sep 29, 2016
Priority date	Jun 20, 2016
Publication date	Nov 6, 2018
Grant date	Nov 6, 2018

Abstract

An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory film within each memory opening, a germanium-containing semiconductor layer and a dielectric layer is formed in each memory opening. Employing the memory film and the dielectric layer as a crucible, a liquid phase epitaxy anneal is performed to convert the germanium-containing semiconductor layer into a germanium-containing epitaxial channel layer. A dielectric core and a drain region can be formed over the dielectric layer. The germanium-containing epitaxial channel layer is single crystalline, and can provide a higher charge carrier mobility than a polysilicon channel.

First claim

What is claimed is:

1. A three-dimensional memory device comprising:
an alternating stack of insulating layers and electrically conductive layers located over a semiconductor substrate;
a memory opening extending through the alternating stack to a top surface of the semiconductor substrate;
a germanium-containing epitaxial channel layer in epitaxial alignment with a single crystalline structure of the semiconductor substrate;
a memory film located on the germanium-containing epitaxial channel layer and in the memory opening;
a drain region contacting a top portion of the germanium-containing epitaxial channel layer and comprising a polycrystalline doped semiconductor material; and
a silicon-containing epitaxial pedestal located between the semiconductor substrate and the germanium-containing epitaxial channel layer within the memory opening and in epitaxial alignment with the semiconductor substrate and with the germanium-containing epitaxial channel layer.

2. The three-dimensional memory device of claim 1 , wherein:
the memory film comprises a layer stack including a charge storage layer and a tunneling dielectric layer; and
the germanium-containing epitaxial channel layer contacts an inner sidewall of the tunneling dielectric layer.

3. The three-dimensional memory device of claim 1 , wherein:
the memory film comprises a vertical tubular portion that extends vertically through a predominant subset of layers in the alternating stack, and an annular bottom portion including an opening therein, wherein the germanium-containing epitaxial channel layer extends through the opening in the annular bottom portion of the memory film; and
a first vertical interface between the germanium-containing epitaxial channel layer and the vertical tubular portion of the memory film is laterally offset from a second vertical interface between the germanium-containing epitaxial channel layer and the annular bottom portion of the memory film.

4. The three-dimensional memory device of claim 1 , further comprising:
a dielectric layer contacting an inner sidewall of the germanium-containing epitaxial channel layer, wherein the germanium-containing epitaxial channel layer has a substantially uniform thickness between the memory film and the dielectric layer;
a dielectric core located within the dielectric layer and comprising silicon oxide.

5. The three-dimensional memory device of claim 1 , wherein:
the silicon-containing epitaxial pedestal comprises a recessed region including a recessed top surface that is located below an annular top surface of the silicon-containing epitaxial pedestal;
a bottommost surface of the germanium-containing epitaxial channel layer contacts the recessed top surface of the silicon-containing epitaxial pedestal;
the silicon-containing epitaxial pedestal includes silicon at an atomic concentration greater than 98%; and
the silicon-containing epitaxial pedestal contacts an annular bottom surface of the memory film.

6. The three-dimensional memory device of claim 1 , wherein the germanium-containing epitaxial channel layer comprises a single crystalline semiconductor layer which includes germanium atoms at an atomic concentration greater than 10%.

7. The three-dimensional memory device of claim 1 , wherein the germanium-containing epitaxial channel layer consists essentially of doped or undoped germanium.

8. The three-dimensional memory device of claim 1 , wherein the germanium-containing epitaxial channel layer extends through a plurality of electrically conductive layers and a plurality of insulating layers within the alternating stack.

9. The three-dimensional memory device of claim 1 , wherein:
the three-dimensional memory device comprises a monolithic three-dimensional NAND memory device;
the electrically conductive layers comprise, or are electrically connected to, a respective word line of the monolithic three-dimensional NAND memory device;
the substrate comprises a silicon substrate;
the monolithic three-dimensional NAND memory device comprises an array of monolithic three-dimensional NAND strings over the silicon substrate;
at least one memory cell in a first device level of the array of monolithic three-dimensional NAND strings is located over another memory cell in a second device level of the array of monolithic three-dimensional NAND strings;
the silicon substrate contains an integrated circuit comprising a driver circuit for the memory device located thereon;
the electrically conductive layers comprise a plurality of control gate electrodes having a strip shape extending substantially parallel to the top surface of the substrate, the plurality of control gate electrodes comprise at least a first control gate electrode located in the first device level and a second control gate electrode located in the second device level; and
the array of monolithic three-dimensional NAND strings comprises:
a plurality of semiconductor channels, wherein at least one end portion of each of the plurality of semiconductor channels extends substantially perpendicular to a top surface of the substrate, and

a plurality of charge storage elements, each charge storage element located adjacent to a respective one of the plurality of semiconductor channels.

10. A three-dimensional memory device comprising:
an alternating stack of insulating layers and electrically conductive layers located over a semiconductor substrate;
a memory opening extending through the alternating stack to a top surface of the semiconductor substrate;
a germanium-containing epitaxial channel layer in epitaxial alignment with a single crystalline structure of the semiconductor substrate; and
a memory film located on the germanium-containing epitaxial channel layer and in the memory opening,
wherein the germanium-containing epitaxial channel layer comprises a silicon-germanium alloy which is under compressive stress.

11. The three-dimensional memory device of claim 10 , further comprising an outer polysilicon channel layer which contacts at least a part of the germanium-containing epitaxial channel layer, wherein the outer polysilicon channel layer is under tensile stress.

12. The three-dimensional memory device of claim 10 , wherein:
the memory film comprises a layer stack including a charge storage layer and a tunneling dielectric layer; and
the germanium-containing epitaxial channel layer contacts an inner sidewall of the tunneling dielectric layer.

13. The three-dimensional memory device of claim 10 , wherein:
the memory film comprises a vertical tubular portion that extends vertically through a predominant subset of layers in the alternating stack, and an annular bottom portion including an opening therein, wherein the germanium-containing epitaxial channel layer extends through the opening in the annular bottom portion of the memory film; and
a first vertical interface between the germanium-containing epitaxial channel layer and the vertical tubular portion of the memory film is laterally offset from a second vertical interface between the germanium-containing epitaxial channel layer and the annular bottom portion of the memory film.

14. The three-dimensional memory device of claim 10 , further comprising:
a dielectric layer contacting an inner sidewall of the germanium-containing epitaxial channel layer, wherein the germanium-containing epitaxial channel layer has a substantially uniform thickness between the memory film and the dielectric layer;
a dielectric core located within the dielectric layer and comprising silicon oxide.

15. The three-dimensional memory device of claim 10 , wherein the germ

Assignees

• Sandisk Technologies Llc

Inventors

• Gunji-Yoneoka Marika
• Suyama Atsushi
• Pachamuthu Jayavel
• Hada Tsuyoshi
• KANG Daewung
• Chowdhury Murshed
• Kai James
• Kinoshita Hiro
• Obu Tomoyuki
• LIYANAGE Luckshitha Suriyasena

Classifications

• H01L27/11556 Primary

  Electricity · mapped topic

• H01L27/11582

  Electricity · mapped topic

• H01L27/1157

  Electricity · mapped topic

• H01L27/11524

  Electricity · mapped topic

• H10B43/35 Primary

  with cell select transistors, e.g. NAND · CPC title