Three dimensional NAND device with silicon germanium heterostructure channel

US9331093B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9331093-B2
Application numberUS-201414505870-A
CountryUS
Kind codeB2
Filing dateOct 3, 2014
Priority dateOct 3, 2014
Publication dateMay 3, 2016
Grant dateMay 3, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming an at least one opening in the stack, forming at least a portion of a memory film in the at least one opening and forming a first portion of a semiconductor channel followed by forming a second portion of the semiconductor channel in the at least one opening. The second portion of the semiconductor channel comprises silicon and germanium and contains more germanium than a first portion of the semiconductor channel which is located closer to the memory film than the second portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A monolithic three dimensional NAND string, comprising: a semiconductor channel, at least one end part of the semiconductor channel extending substantially perpendicular to a major surface of a substrate; a plurality of control gate electrodes extending substantially parallel to the major surface of the substrate, wherein the plurality of control gate electrodes comprise at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the major surface of the substrate and below the first device level, wherein the first control gate electrode is separated from the second control gate electrode by an insulating layer located between the first and second control gates; a blocking dielectric located adjacent the plurality of control gate electrodes; at least one charge storage region located adjacent the blocking dielectric; and a tunnel dielectric located between the at least one charge storage region and the semiconductor channel, wherein a second portion of the semiconductor channel comprises silicon and germanium and contains more germanium than a first portion of the semiconductor channel which is located closer to the tunnel dielectric than the second portion. 2. The monolithic three dimensional NAND string of claim 1 , wherein the second portion of the semiconductor channel comprises silicon-germanium having a constant germanium concentration throughout the second portion of the channel. 3. The monolithic three dimensional NAND string of claim 1 , wherein the second portion of the channel comprises silicon-germanium having a graded germanium concentration in the second portion of the channel. 4. The monolithic three dimensional NAND string of claim 3 , wherein the graded germanium concentration comprises a lower concentration of germanium closer to the tunnel dielectric and a higher concentration of germanium farther from the tunnel dielectric. 5. The monolithic three dimensional NAND string of claim 1 , wherein the first portion of the semiconductor channel comprises substantially germanium free silicon or silicon-germanium having a lower concentration of germanium than the second portion. 6. The monolithic three dimensional NAND string of claim 5 , wherein the first portion of the semiconductor channel comprises the substantially germanium free silicon. 7. The monolithic three dimensional NAND string of claim 5 , wherein the first portion of the semiconductor channel comprises the silicon-germanium having a lower concentration of germanium than the second portion. 8. The monolithic three dimensional NAND string of claim 7 , wherein: the second portion of the semiconductor channel comprises a constant germanium concentration throughout the second portion of the semiconductor channel; the first portion of the semiconductor channel comprises a constant germanium concentration throughout the first portion of the semiconductor channel; the concentration of germanium in the first portion is lower than the concentration in the second portion; and a change in germanium concentration at an interface between the second portion and the first portion is abrupt. 9. The monolithic three dimensional NAND string of claim 7 , wherein the first portion of the channel comprises a graded concentration having a first germanium concentration gradient in a direction parallel to the major surface of the substrate and the second portion of the channel comprises a graded concentration having a second germanium concentration gradient in the direction parallel to the major surface of the substrate. 10. The monolithic three dimensional NAND string of claim 9 , wherein the first germanium concentration gradient the same as the second germanium concentration gradient and the channel comprises an abrupt interface between the first and the second portions of the channel. 11. The monolithic three dimensional NAND string of claim 9 , wherein the first germanium concentration gradient is the same as the second germanium concentration gradient and the channel lacks an abrupt interface between the first and the second portions of the channel. 12. The monolithic three dimensional NAND string of claim 9 , wherein the first germanium concentration gradient is different from the second germanium concentration gradient and the channel comprises an abrupt interface between the first and the second portions of the channel. 13. The monolithic three dimensional NAND string of claim 9 , wherein the first germanium concentration gradient is different from the second germanium concentration gradient and the channel lacks an abrupt interface between the first and the second portions of the channel. 14. The monolithic three dimensional NAND string of claim 7 , wherein one of the first or the second portions of the semiconductor channel has a graded germanium concentration and the other one of the first or the second portions of the semiconductor channel has a constant germanium concentration. 15. The monolithic three dimensional NAND string of claim 1 , wherein the second portion of the semiconductor channel is under compressive stress and the first portion of the semiconductor channel is under tensile stress. 16. The monolithic three dimensional NAND string of claim 1 , wherein the semiconductor channel comprises a hollow cylinder and wherein the NAND string further comprises an insulating core fill in the hollow cylinder. 17. The monolithic three dimensional NAND string of claim 1 , wherein a bottom portion of the semiconductor channel is located in an undercut below the tunnel dielectric and the at least one charge storage region. 18. The monolithic three dimensional NAND string of claim 1 , wherein the semiconductor channel is polycrystalline and doped with carbon or nitrogen. 19. The monolithic three dimensional NAND string of claim 1 , wherein the substrate is silicon and the NAND string further comprises an epitaxial silicon pillar located between the substrate and the semiconductor channel. 20. The monolithic three dimensional NAND string of claim 1 , wherein: the substrate comprises a silicon substrate; the monolithic three dimensional NAND string is located in an array of monolithic three dimensional NAND strings over the silicon substrate; at least one memory cell in the first device level of the three dimensional array of NAND strings is located over another memory cell in the second device level of the three dimensional array of NAND strings; and the silicon substrate contains an integrated circuit comprising a driver circuit for the memory device located thereon.

Assignees

Inventors

Classifications

  • Pulsed laser beam · CPC title

  • Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth · CPC title

  • Silicon, silicon germanium or germanium · CPC title

  • Silicon, silicon germanium or germanium · CPC title

  • using chemical vapour deposition [CVD] · CPC title

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What does patent US9331093B2 cover?
A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming an at least one opening in the stack, forming at least a portion of a memory film in the at least one opening and forming a first portion of a semiconductor channel followed by forming …
Who is the assignee on this patent?
Sandisk Technologies Inc
What technology area does this patent fall under?
Primary CPC classification H10D64/035. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 03 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).