Substrate conductor structure and method

Patent metadata

Field	Value
Publication number	US-10121701-B2
Application number	US-201615220143-A
Country	US
Kind code	B2
Filing date	Jul 26, 2016
Priority date	Jun 26, 2012
Publication date	Nov 6, 2018
Grant date	Nov 6, 2018

Abstract

Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.

First claim

What is claimed is:

1. A method of forming a semiconductor device, comprising:
ablating core material to form a first non-cylindrical hole in the core material, the first non-cylindrical hole comprising a first substantially elongated slot with rounded ends;
situating first conductor material on walls of the first non-cylindrical hole;
using a flash plate step to increase a thickness of the first conductor material on the walls of the first non-cylindrical hole;
filling a void between the walls lined with the first conductor material with a plugging resin;
ablating the plugging resin to form a second non-cylindrical hole all the way through the resin, the second non-cylindrical hole contained within the first non-cylindrical hole, the second non-cylindrical hole comprising a second substantially elongated slot with rounded ends;
situating second conductor material on walls of the plugging resin and the second non-cylindrical hole;
using a flash plate step to increase a thickness of the second conductor material on the walls of the second non-cylindrical hole;
and bridging the second conductor material on the walls of the second non-cylindrical hole to fill the second non-cylindrical hole with conductor material.

2. The method of claim 1 , wherein ablating the core material includes ablating the core material on a first side to a partial depth of the core material to form a pattern of first holes to the partial depth and ablating the core material on a second side opposite the first side to form a pattern of second holes that mirrors the pattern of the first holes so as to create the non-cylindrical holes all the way through the core material.

3. The method of claim 2 , wherein situating the conductor material includes using an electroless plating process to situate the conductor material.

4. The method of claim 3 , further comprising roughening the conductor material to enhance an adhesion property of the conductor material.

5. The method of claim 4 , wherein roughening the conductor material includes using a black oxide to roughen the conductor material.

6. The method of claim 5 , further comprising grinding the plugging resin to remove excess resin out of the first non-cylindrical hole.

7. The method of claim 6 , wherein ablating the plugging resin includes ablating the plugging resin on a first side to a partial depth of the plugging resin to form a pattern of first holes to the partial depth and ablating the plugging resin on a second side opposite the first side to form a pattern of second holes that mirrors the pattern of the first holes so as to create the second non-cylindrical holes all the way through the plugging resin.

8. The method of claim 7 , wherein situating the second conductor material includes using an electroless plating process to situate the conductor material.

9. The method of claim 8 , further comprising roughening the second conductor material to enhance an adhesion property of the second conductor material.

10. The method of claim 9 , wherein roughening the second conductor material includes using a black oxide to roughen the conductor material.

Assignees

• Intel Corp

Inventors

• Chase Harold Ryan
• Roy Mihir K
• Manusharow Mathew J
• Hlad Mark

Classifications

• H10P14/46

  using a liquid · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/877

  Bump connectors and die-attach connectors · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title