Substrate conductor structure and method

Patent metadata

Field	Value
Publication number	US-9406587-B2
Application number	US-201213533655-A
Country	US
Kind code	B2
Filing date	Jun 26, 2012
Priority date	Jun 26, 2012
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor chip;
a package substrate, including a dielectric core, attached to the semiconductor chip;
a solid elongated conductor comprising a solid, rectangular plate conductor extending from a top surface of the substrate to a bottom surface of the substrate through the dielectric core and elongated in a direction within a major plane of the package substrate, forming side regions adjacent to the major surfaces of the rectangular plate conductor,
the elongated conductor comprising a first and second solid plate conductor, each rectangular in shape with rounded corners and elongated in the same direction as the elongated conductor, in contact with opposing ends of the elongated conductor at the top and bottom surface of the substrate;
a plurality of solid conductor structures situated at the side regions, and extending through a thickness of the dielectric core from the top surface of the substrate to the bottom surface of the substrate and separated from the elongated conductor by a portion of the dielectric core,
each of the conductor structures comprising a rounded conductor elongated in a direction generally perpendicular to the major plane of the package and a solid, round plate conductor on each end of the round conductor at the top and bottom surface of the substrate wherein the diameter of the round plate conductors is greater than the diameter of the rounded conductor;
and wherein a thickness of the elongated conductor is between approximately 300-500 micro meters.

2. The semiconductor device of claim 1 , wherein the solid elongated conductor includes copper.

3. The semiconductor device of claim 1 , wherein the solid elongated conductor is configured to transmit electricity between a top surface of the substrate and a bottom surface of the substrate.

4. The semiconductor device of claim 1 , wherein the solid elongated conductor is configured to shield signal carrying structures adjacent to the solid elongated conductor.

5. The semiconductor device of claim 1 , further including a number of levels of interconnection circuitry located between the substrate and the semiconductor chip.

6. The semiconductor device of claim 1 , further including a number of levels of interconnection circuitry located on a side of the substrate opposite from the semiconductor chip.

7. The semiconductor device of claim 1 , wherein a length of the solid elongated conductor is between approximately 50-300 micro meters.

8. The semiconductor device of claim 1 , wherein a width of the solid elongated conductor is between approximately 50-150 micro meters.

9. An electronic device according to any one of the preceding claims wherein the semiconductor chip includes a processor and wherein the processor is coupled to a memory device.

10. A semiconductor device, comprising:
a semiconductor chip;
a package substrate, comprising a dielectric core, attached to the semiconductor chip;
a rectangular elongated conductor comprising elongated sides, the conductor elongated in a direction within a major plane of the package substrate and extending through a thickness of the dielectric core in the package substrate,
and wherein the elongated conductor is coupled to a top and a bottom conductor portion that are in plane with a top and bottom surface of the package substrate, the top and bottom conductor portions each rectangular in shape with rounded corners and elongated in the same direction as the elongated conductor;
and a plurality of conductor structures situated in a row along each of the sides of the elongated structure, each of the conductor structures including a plate conductor on each end of a thinner conductor, the thinner conductor elongated in a direction generally perpendicular to the major plane of the package.

11. The semiconductor device of claim 10 , wherein the dielectric includes a polymer resin.

12. The semiconductor device of claim 10 , wherein the solid elongated conductor includes copper.

13. The semiconductor device of claim 10 , wherein at least one internal conductor carries power.

14. The semiconductor device of claim 10 , wherein at least one internal conductor transmits a data signal.

Assignees

• Chase Harold Ryan
• Roy Mihir K
• Manusharow Mathew J
• Hlad Mark
• Intel Corp

Inventors

• Chase Harold Ryan
• Roy Mihir K
• Manusharow Mathew J
• Hlad Mark

Classifications

• H10P14/46

  using a liquid · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/877

  Bump connectors and die-attach connectors · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title