Multilayer structure for reducing film roughness in magnetic devices

US10115892B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10115892-B2
Application numberUS-201715599755-A
CountryUS
Kind codeB2
Filing dateMay 19, 2017
Priority dateNov 23, 2015
Publication dateOct 30, 2018
Grant dateOct 30, 2018

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  1. Title

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  2. Abstract

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Abstract

Official abstract text for this publication.

A seed layer stack with a uniform top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer on a smoothing layer such as Mg where the latter has a resputtering rate 2 × to 30 × that of the amorphous layer. The uppermost seed (template) layer is NiW, NiMo, or one or more of NiCr, NiFeCr, and Hf while the bottommost seed layer is Ta or TaN, for example. Accordingly, perpendicular magnetic anisotropy in an overlying magnetic layer is maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded memory devices, or read head sensors. The amorphous seed layer is SiN, TaN, or CoFeM where M may be B.

First claim

Opening claim text (preview).

We claim: 1. A multilayer structure for reducing film roughness in a magnetic device, comprising: (a) a buffer layer that is one or more of Zr, ZrN, Nb, NbN, Mo, MoN, TiN, W, WN, and Ru, or one of more of the aforementioned materials with Ta or TaN that is formed on a substrate; (b) a first smoothing layer (S 1 ) with a first bond energy, and having a first surface with an “as deposited” first peak to peak roughness, the S 1 is formed on the buffer layer; and (c) a second smoothing layer (S 2 ) that is non-crystalline or nano-crystalline with a second bond energy that is greater than the first bond energy such that deposition of the S 2 results in resputtering of the S 1 to give S 1 with a second surface having a second peak to peak roughness less than the “as deposited” first peak to peak roughness, and the S 2 formed on the second surface, the S 2 has a third surface with the second peak to peak roughness. 2. The multilayer structure of claim 1 , further comprised of a template layer that is an uppermost layer in the multilayer structure, and with a top surface having the second peak to peak roughness, the template layer has a (111) crystal orientation to promote perpendicular magnetic anisotropy (PMA) in an overlying magnetic layer. 3. The multilayer structure of claim 2 , wherein the template layer is one of NiW, NiMo, NiCr, NiFeCr, Hf, Hf/NiCr, Hf/NiFeCr, NiCr/Hf, or NiFeCr/Hf. 4. The multilayer structure of claim 1 , wherein the S 1 is one or more of Mg, Al, Si, C, B, Mn, Rb, Zn, and Ti. 5. The multilayer structure of claim 1 , wherein the S 2 is one of TaN, SiN, and a CoFeM alloy wherein M is one of B, P, Ta, Zr, Si, Cu, Hf, Mo, W, and Nb with a content which makes the CoFeM alloy amorphous as deposited. 6. The multilayer structure of claim 1 , wherein the S 1 has a thickness from 3 Angstroms to 100 Angstroms. 7. The multilayer structure of claim 1 , wherein the S 2 has a thickness from 1 Angstrom to 100 Angstroms.

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Classifications

  • Spin-exchange coupled multilayers having at least one layer with perpendicular magnetic anisotropy · CPC title

  • details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

  • the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ] · CPC title

  • Spin-exchange-coupled multilayers, e.g. nanostructured superlattices {(applying spin-exchange-coupled multilayers to substrates H01F41/302)} · CPC title

  • with exchange coupling adjustment of magnetic film pairs, e.g. interface modifications by reduction, oxidation · CPC title

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What does patent US10115892B2 cover?
A seed layer stack with a uniform top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer on a smoothing layer such as Mg where the latter has a resputtering rate 2 × to 30 × that of the amorphous layer. The uppermost seed (template) layer is NiW, NiMo, or one or more of NiCr, NiFeCr, and Hf while the bottommost seed layer is Ta or TaN, for examp…
Who is the assignee on this patent?
Headway Tech Inc
What technology area does this patent fall under?
Primary CPC classification H01F10/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 30 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).