Electronic substrate, semiconductor device, and electronic device
US-9251942-B2 · Feb 2, 2016 · US
US10111330B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10111330-B2 |
| Application number | US-201515319997-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 24, 2015 |
| Priority date | Jun 26, 2014 |
| Publication date | Oct 23, 2018 |
| Grant date | Oct 23, 2018 |
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Official abstract text for this publication.
A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, and a conductive pattern formed on at least one of surfaces of the base film, wherein at least a portion of the conductive pattern includes a core body, and a shrink layer formed by plating on an outer surface of the core body. The portion of the conductive pattern preferably has a striped configuration or a spiral configuration. The portion of the conductive pattern preferably has an average circuit gap width of 30 μm or less. The portion of the conductive pattern preferably has an average aspect ratio of 0.5 or more. The plating is preferably electroplating or electroless plating.
Opening claim text (preview).
The invention claimed is: 1. A printed circuit board comprising a base film having an insulating property, and a conductive pattern formed on at least one of surfaces of the base film, wherein at least a portion of the conductive pattern includes a core body, and a shrink layer formed by plating on an outer surface of the core body, wherein the portion of the conductive pattern has an average circuit gap width of 30 μM or less and 3 μm or more, and the shrink layer is formed so as to cover both a top surface and side surfaces of the core body, wherein the portion of the conductive pattern has a spiral configuration, and in the spiral portion, a width of the core body increases from an outside to an inside of the spiral portion. 2. The printed circuit board according to claim 1 , wherein the portion of the conductive pattern has an average aspect ratio of 0.5 or more. 3. The printed circuit board according to claim 1 , wherein the plating is electroplating or electroless plating. 4. The printed circuit board according to claim 1 , wherein the core body and the shrink layer have a main component that is copper or copper alloy. 5. The printed circuit board according to claim 1 , further comprising a conductive pattern formed on another one of the surfaces of the base film, wherein at least a portion of this conductive pattern also includes the core body and the shrink layer. 6. An electronic component comprising the printed circuit board according to claim 1 . 7. The printed circuit board according to claim 1 , wherein the conductive pattern has a single continuous line configuration including the spiral portion formed on a front surface side of the base film, an outer linear portion connected to an outermost end of the spiral portion, and an inner linear portion formed on a back surface side of the base film and connected via a through-hole to an innermost end of the spiral portion.
Reinforcing of the conductive pattern {(by solder coating H05K3/3465)} · CPC title
Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer · CPC title
incorporating printed inductors · CPC title
Insulated {conductive substrates, e.g. insulated} metal substrate · CPC title
for electroless plating (H05K3/4661 takes precedence) · CPC title
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