Under bump metallurgy (UBM) and methods of forming same

US10109607B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10109607-B2
Application numberUS-201715722578-A
CountryUS
Kind codeB2
Filing dateOct 2, 2017
Priority dateJun 30, 2015
Publication dateOct 23, 2018
Grant dateOct 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device package includes a die, fan-out redistribution layers (RDLs) over the die, and an under bump metallurgy (UBM) over the fan-out RDLs. The UBM comprises a conductive pad portion and a trench encircling the conductive pad portion. The device package further includes a connector disposed on the conductive pad portion of the UBM. The fan-out RDLs electrically connect the connector and the UBM to the die.

First claim

Opening claim text (preview).

What is claimed: 1. A method for forming a device package, the method comprising: forming a seed layer over a die; forming a conductive line on the seed layer; forming a first mask layer over the conductive line and the seed layer; patterning openings in the first mask layer, wherein the openings comprise: a first opening for a conductive pad portion of an under bump metallurgy (UBM); and a second opening for a retaining wall portion of the UBM, wherein the second opening forms a ring around the first opening, and wherein a portion of the first mask layer remains disposed between the first opening and the second opening; forming the UBM in the first opening and the second opening, the UBM comprising the conductive pad portion contacting a surface of the conductive line, the UBM further comprising the retaining wall portion having a bottom-most portion that physically contacts the conductive line; removing the first mask layer to form a trench that encircles the conductive pad portion of the UBM and separates the conductive pad portion of the UBM from the retaining wall portion of the UBM; forming an insulating layer that physically contacts a sidewall of the bottom-most portion of the retaining wall portion of the UBM, wherein the sidewall is directed away from the trench; and mounting a solder ball to the conductive pad portion of the UBM. 2. The method of claim 1 , wherein forming the UBM comprises filling the first opening and the second opening with conductive material. 3. The method of claim 2 , wherein filling the first opening and the second opening with conductive material comprises providing nucleation sites for a plating process, wherein the nucleation sites are provided by at least one of the conductive line or the seed layer. 4. The method of claim 1 , wherein forming the conductive line comprises: before forming the first mask layer, forming a second mask layer over the seed layer; patterning a third opening in the second mask layer, wherein the third opening exposes the seed layer; and filling the third opening with a conductive material to form the conductive line. 5. The method of claim 1 , further comprising etching portions of the seed layer. 6. The method of claim 5 , wherein the seed layer is not etched until after forming the UBM. 7. The method of claim 1 , further comprising: forming a polymer layer over the UBM; and patterning the polymer layer to expose at least a portion of the UBM. 8. The method of claim 7 , wherein, after patterning the polymer layer, the conductive pad portion is free from the polymer layer and the polymer layer overlies outermost sidewalls of the retaining wall portion of the UBM. 9. A method for forming a device package, the method comprising: patterning openings in a mask layer to expose a conductive line, wherein the openings comprise: a central opening for a conductive pad portion of an under bump metallurgy (UBM); and a peripheral opening for a retaining wall portion of the UBM, wherein the peripheral opening forms a ring around the central opening; and filling the central opening and the peripheral opening with conductive material to form the UBM, wherein the conductive pad portion of the UBM contacts a surface of the conductive line, wherein the retaining wall portion of the UBM has a bottom-most portion having a bottom-most surface physically contacting the conductive line, and wherein a sidewall of the bottom-most portion of the retaining wall portion of the UBM is directed away from the conductive pad portion of the UBM and physically contacts an insulating material. 10. The method of claim 9 , wherein the conductive pad portion of the UBM physically contacts the surface of the conductive line. 11. The method of claim 9 , wherein a portion of the mask layer separates the central opening from the peripheral opening. 12. The method of claim 11 , wherein a dimension of the portion of the mask layer is between 10 micrometers and 20 micrometers. 13. The method of claim 9 , wherein filling the central opening and the peripheral opening with conductive material comprises a plating process using the mask layer as a plating mask. 14. The method of claim 9 , wherein filling the central opening and the peripheral opening with conductive material comprises providing nucleation sites for a plating process, wherein the nucleation sites are provided by at least one of the conductive line or a seed layer. 15. The method of claim 9 , wherein a dimension of the retaining wall portion of the UBM is between 10 micrometers and 20 micrometers. 16. The method of claim 9 , further comprising: removing the mask layer to form a trench between the conductive pad portion of the UBM and the retaining wall portion of the UBM; and forming a connector over the conductive pad portion of the UBM, wherein no portion of the connector is disposed in the trench. 17. A method for forming a device package, the method comprising: forming a redistribution layer (RDL) over a die; forming a polymer layer over the RDL, the polymer layer having an opening exposing a portion of the RDL; depositing a seed layer over the polymer layer and the RDL, and over sidewalls of the opening; forming a conductive line on the seed layer; forming a first mask layer having a first opening and a second opening over the conductive line and the seed layer; and forming an under bump metallurgy (UBM) in the first opening and the second opening, the UBM comprising a conductive pad portion within the first opening, the conductive pad portion contacting a surface of the conductive line, the UBM further comprising a retaining wall portion within the second opening, the retaining wall portion having a bottom-most portion having a bottom-most surface physically contacting the conductive line, wherein a sidewall of the bottom-most portion of the retaining wall portion of the UBM is directed away from the conductive pad portion of the UBM and physically contacts an insulating material. 18. The method of claim 17 , wherein the second opening forms a ring around the first opening and is separated from the first opening by a distance between 10 micrometers and 20 micrometers. 19. The method of claim 17 , further comprising: removing the first mask layer to form a trench between the conductive pad portion of the UBM and the retaining wall portion of the UBM; and forming a connector over the conductive pad portion of the UBM. 20. The method of claim 19 , wherein no portion of the connector is disposed in the trench and no portion of the connector is disposed on the retaining wall portion of the UBM.

Assignees

Inventors

Classifications

  • relative to the surface, e.g. recessed, protruding · CPC title

  • on encapsulations · CPC title

  • by using masks · CPC title

  • Changing the shapes of bond pads · CPC title

  • by plating, e.g. electroless plating or electroplating · CPC title

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Frequently asked questions

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What does patent US10109607B2 cover?
A device package includes a die, fan-out redistribution layers (RDLs) over the die, and an under bump metallurgy (UBM) over the fan-out RDLs. The UBM comprises a conductive pad portion and a trench encircling the conductive pad portion. The device package further includes a connector disposed on the conductive pad portion of the UBM. The fan-out RDLs electrically connect the connector and the U…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/063. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).