Semiconductor device including capacitor

Patent metadata

Field	Value
Publication number	US-10090377-B2
Application number	US-201715424951-A
Country	US
Kind code	B2
Filing date	Feb 6, 2017
Priority date	Apr 26, 2016
Publication date	Oct 2, 2018
Grant date	Oct 2, 2018

Abstract

A semiconductor device comprises a capacitor that includes a first electrode, a second electrode, and a dielectric layer between the first electrode and the second electrode. The dielectric layer comprises a first high-k dielectric layer between the first electrode and the second electrode, a first silicon oxide layer between the first high-k dielectric layer and the second electrode, and a first aluminum oxide layer between the first high-k dielectric layer and the second electrode.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a capacitor that includes a first electrode, a second electrode, and a dielectric layer between the first electrode and the second electrode,
wherein the dielectric layer comprises:
a first high-k dielectric layer between the first electrode and the second electrode;
a first silicon oxide layer between the first high-k dielectric layer and the second electrode; and
a first aluminum oxide layer between the first high-k dielectric layer and the second electrode,
wherein the first high-k dielectric is crystalline, and the first silicon oxide layer and the first aluminum oxide layer are both amorphous.

2. The semiconductor device of claim 1 , wherein the first high-k dielectric layer has a thickness greater than a thickness of each of the first silicon oxide layer and the first aluminum oxide layer.

3. The semiconductor device of claim 1 , Wherein the first silicon oxide layer has a thickness less than a thickness of the first aluminum oxide layer.

4. The semiconductor device of claim 1 , wherein the first high-k dielectric layer is disposed directly on the first electrode.

5. The semiconductor device of claim 1 ,
wherein the dielectric layer further comprises:
a second high-k dielectric layer between the first high-k dielectric layer and the first silicon oxide and first aluminum oxide layers;
wherein the second high-k dielectric layer has a thickness less than a thickness of the first high-k dielectric layer.

6. The semiconductor device of claim 5 , wherein the dielectric layer further comprises a second silicon oxide layer between the second high-k dielectric layer and the first high-k dielectric layer,
wherein the second high-k dielectric layer has a thickness greater than a thickness of the first silicon oxide layer, a thickness of the second silicon oxide layer, and a thickness of the first aluminum oxide layer.

7. The semiconductor device of claim 5 ,
wherein the dielectric layer further comprises a second aluminum oxide layer between the second high-k dielectric layer and the first high-k dielectric layer,
wherein the second high-k dielectric layer has a thickness greater than a thickness of the first silicon oxide layer, a thickness of the first aluminum oxide layer, and a thickness of the second aluminum oxide layer.

8. A semiconductor device, comprising:
a capacitor that includes a first electrode, a dielectric layer, and a second electrode that are sequentially stacked on a substrate,
wherein the dielectric layer comprises:
a first high-k dielectric layer on the first electrode;
a second high-k dielectric layer on the first high-k dielectric layer;
a first leakage prevention oxide layer between the first high-k dielectric layer and the second high-k dielectric layer; and
a second leakage prevention oxide layer and a third leakage prevention oxide layer that are sequentially stacked on the second high-k dielectric layer,

wherein the first leakage prevention oxide layer is a silicon oxide layer or an aluminum oxide layer, and
wherein one of the second and third leakage prevention oxide layers is a silicon oxide layer and the other of the second and third leakage prevention oxide layers is an aluminum oxide layer.

9. The semiconductor device of claim 8 , wherein the first high-k dielectric layer has a thickness greater than a thickness of the second high-k dielectric layer.

10. The semiconductor device of claim 8 , wherein
the first and second high-k dielectric layers are a zirconium oxide layer, and
the first high-k dielectric layer has a dielectric constant greater than a dielectric constant of the second high-k dielectric layer.

11. The semiconductor device of claim 8 , wherein
the first high-k dielectric layer is thicker than each of the first, second, and third leakage prevention oxide layers, and
the second high-k dielectric layer is thicker than each of the first, second, and third leakage prevention oxide layers.

12. A semiconductor device, comprising:
an interlayer dielectric layer on a substrate;
a plurality of contact plugs that penetrate through the interlayer dielectric layer; and
a plurality of capacitors on the interlayer dielectric layer, each including a bottom electrode electrically connected to a corresponding one of the contact plugs, and a dielectric layer that covers the bottom electrode and that includes a first high-k dielectric layer on the bottom electrode, and a pair of leakage prevention oxide layers that are sequentially stacked on the first high-k dielectric layer,
wherein one of the pair of leakage prevention oxide layers is a silicon oxide layer and the other of the pair of leakage prevention oxide layers is an aluminum oxide layer.

13. The semiconductor device of claim 12 , wherein the dielectric layer further comprises:
a second high-k dielectric layer between the first high-k dielectric layer and the pair of leakage prevention oxide layers;
wherein the first and second high-k dielectric layers are a zirconium oxide layer, and
the first high-k dielectric layer has a dielectric constant greater than a dielectric constant of the second high-k dielectric layer.

14. The semiconductor device of claim 13 , wherein the dielectric layer further comprises a third leakage prevention oxide layer between the second high-k dielectric layer and the first high-k dielectric layer,
wherein the third leakage prevention oxide layer is a silicon oxide layer or an aluminum oxide layer, and
wherein the second high-k dielectric layer has a thickness greater than a thickness of the each of the pair of leakage prevention oxide layers and a thickness of the third leakage prevention oxide layer.

15. The semiconductor device of claim 12 , wherein the plurality of capacitors further comprises a top electrode that covers the plurality of bottom electrodes with the dielectric layer interposed therebetween.

16. The semiconductor device of claim 15 , wherein each of the bottom electrodes has a pillar shape, and the top electrode and dielectric layer conformally cover a top surface and sidewalls of each of the bottom electrodes.

17. The semiconductor device of claim 15 , wherein each of the bottom electrodes has a hollow cylindrical shape with a closed bottom end, and the top electrode and dielectric layer conformally cover a top surface and inner and outer sidewalls of each of the bottom electrodes.

18. The semiconductor device of claim 15 , wherein each of the bottom electrodes is disposed in an insulation layer on the interlayer dielectric layer, each of the bottom electrodes has a hollow cylindrical shape with a closed bottom end, and sidewalls of the bottom electrodes are in contact with the insulation layer, and the top electrode is provided on the insulation layer and covers an inner sidewall of each of the bottom electrodes.

19. The semiconductor device of claim 18 , wherein each of the bottom electrodes includes an extension that extends onto an upper insulation layer.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Chang Jaewan
• Kim Younsoo
• Moon Sunmin
• Choi Jaehyoung

Classifications

• H01L28/60

  Electricity · mapped topic

• H01L28/40 Primary

  Electricity · mapped topic

• H01L28/90

  Electricity · mapped topic

• H10D1/716

  having vertical extensions · CPC title

• H10D1/692

  Electrodes · CPC title