Semiconductor device and manufacturing method of the same
US-9431435-B2 · Aug 30, 2016 · US
US9564217B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9564217-B1 |
| Application number | US-201514886116-A |
| Country | US |
| Kind code | B1 |
| Filing date | Oct 19, 2015 |
| Priority date | Oct 19, 2015 |
| Publication date | Feb 7, 2017 |
| Grant date | Feb 7, 2017 |
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A semiconductor memory device includes a semiconductor substrate having a main surface, at least a first dielectric layer on the main surface of the semiconductor substrate, a first OS FET device and a second OS FET device disposed on the first dielectric layer, at least a second dielectric layer covering the first dielectric layer, the first OS FET device, and the second OS FET device, a first MIM capacitor on the second dielectric layer and electrically coupled to the first OS FET device, and a second MIM capacitor on the second dielectric layer and electrically coupled to the second OS FET device.
Opening claim text (preview).
What is claimed is: 1. A semiconductor memory device, comprising: a semiconductor substrate having a main surface; at least a first dielectric layer on the main surface of the semiconductor substrate; a first oxide semiconductor field effect transistor (OS FET) device disposed on the first dielectric layer; a second OS FET device disposed on the first dielectric layer; at least a second dielectric layer covering the first dielectric layer, the first OS FET device, and the second OS FET device; a first metal-insulator-metal (MIM) capacitor on the second dielectric layer and electrically coupled to the first OS FET device, thereby constituting a dynamic oxide semiconductor random access memory (DOSRAM) cell, wherein the first MIM capacitor comprises a first bottom plate (BP) in a first capacitor trench, a first high-k dielectric layer on the first BP, and a first top plate (TP) on the first high-k dielectric layer; and a second MIM capacitor on the second dielectric layer and electrically coupled to the second OS FET device, thereby constituting a non-volatile oxide semiconductor random access memory (NOSRAM) cell. 2. The semiconductor memory device of claim 1 , wherein the first OS FET device or the second OS FET device comprises a gate electrode, a source electrode, and a drain electrode, wherein the gate electrode traverses a channel material layer. 3. The semiconductor memory device of claim 2 , wherein the channel material layer comprises an oxide semiconductor (OS) material layer, wherein the oxide semiconductor material layer comprises In—Ga—Zn oxide (IGZO) or c-axis aligned crystalline oxide semiconductor (CAAC-OS) materials. 4. The semiconductor memory device of claim 1 further comprising at least a metal-oxide-semiconductor field-effect-transistor (MOS FET) device disposed on and in the main surface of the semiconductor substrate. 5. The semiconductor memory device of claim 1 , wherein the high-k dielectric layer comprises Al 2 O 3 , HfO x , ZrO x , BaTiO x , or ZrO 2 —Al 2 O 3 —ZrO 2 (ZAZ). 6. The semiconductor memory device of claim 1 , wherein the second MIM capacitor comprises a second BP on the second dielectric layer, a low-leakage dielectric layer on the second BP, and a second TP on the low-leakage dielectric layer. 7. The semiconductor memory device of claim 6 , wherein the low-leakage dielectric layer comprises SiO 2 , SiON, SiN, or ONO. 8. The semiconductor memory device of claim 6 , wherein the second BP comprises an electrically floating first metal layer, a second high-k dielectric layer on the first metal layer, and a second metal layer on the second high-k dielectric layer. 9. The semiconductor memory device of claim 6 , wherein the second BP is disposed in a second capacitor trench.
the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title
the material containing two or more metal elements · CPC title
the material containing zirconium, e.g. ZrO2 · CPC title
the material containing hafnium, e.g. HfO2 · CPC title
the material containing aluminium, e.g. Al2O3 · CPC title
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