Cross-point memory and methods for fabrication of same

Patent metadata

Field	Value
Publication number	US-10084016-B2
Application number	US-201314086460-A
Country	US
Kind code	B2
Filing date	Nov 21, 2013
Priority date	Nov 21, 2013
Publication date	Sep 25, 2018
Grant date	Sep 25, 2018

Abstract

A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The method additionally includes forming a free-standing pillar of a memory cell stack on the first conductive line after patterning the first conductive line. Forming the free-standing pillar includes depositing a memory cell stack comprising a selector material and a storage material over the conductive line and patterning the memory cell stack to form the free-standing pillar. The method further includes patterning a second conductive line on the pillar after patterning the memory cell stack, the second conductive line extending in a second direction crossing the first direction.

First claim

What is claimed is:

1. A memory device, comprising
a first conductive line extending in a first direction;
a first liner in contact with a sidewall of the first conductive line, wherein the first liner is in contact with a sidewall of another first conductive line extending parallel to the first conductive line, wherein the first liner covers a surface that extends between the first conductive line and the another first conductive line;
a first insulating material different from the first liner having a first sidewall and a second sidewall, the first sidewall and the second sidewall of the first insulating material in contact with the first liner;
a second conductive line extending in a second direction crossing the first direction;
a second liner in contact with a sidewall of the second conductive line and a sidewall of another second conductive line extending parallel to each other;
a pillar of a memory cell stack formed between and electrically connected to the first and second conductive lines, the pillar comprising:
a selector element disposed over the first conductive line,
a storage element disposed over the selector element;
a pillar liner continuously surrounding and in contact with a plurality of side surfaces of the pillar, the pillar liner in contact with the first liner and the first insulating material; and
a pillar insulating material different from the pillar liner, the pillar insulating material continuously surrounding and in contact with the pillar liner.

2. The memory device of claim 1 , wherein the pillar insulating material is in contact with a plurality of side surfaces of the pillar liner.

3. The memory device of claim 1 , wherein the selector element comprises a chalcogenide storage material.

4. The memory device of claim 1 , wherein the storage element comprises a chalcogenide selector material.

5. The memory device of claim 4 , wherein the chalcogenide selector material comprises arsenic.

6. The memory device of claim 1 , wherein the pillar further comprises a middle electrode interposed between the selector element and the storage element, wherein the middle electrode comprises carbon.

7. The memory device of claim 1 , wherein the pillar further comprises a second electrode interposed between the storage element and the second conductive line.

8. The memory device of claim 1 , further comprising at least one of a first electrode line interposed between the first conductive line and the pillar and a second electrode line interposed between the second conductive line and the pillar.

9. The memory device of claim 8 , wherein the pillar is formed on a surface comprising the first electrode line and adjacent spaces filled with an isolation dielectric, the adjacent spaces extending in the first direction.

10. The memory device of claim 9 , wherein the pillar liner contacts portions of the first electrode line and portions of the isolation dielectric.

11. The memory device of claim 1 , wherein the pillar liner is positioned between the first insulating material and the pillar insulating material.

12. The memory device of claim 1 , wherein the second conductive line is in contact with a second electrode.

13. The memory device of claim 1 , wherein the second liner covers a surface that extends between the second conductive line and the another second conductive line.

Assignees

• Micron Technology Inc

Inventors

• Donghi Ombretta
• Ravasio Marcello
• Sciarrillo Samuele
• Somaschini Roberto

Classifications

• H01L45/144

  Electricity · mapped topic

• H01L45/1233

  Electricity · mapped topic

• H01L45/1675

  Electricity · mapped topic

• H01L27/2427

  Electricity · mapped topic

• H01L45/06

  Electricity · mapped topic