Methods of forming short channel and long channel finFET devices so as to adjust threshold voltages

Patent metadata

Field	Value
Publication number	US-10074732-B1
Application number	US-201715622902-A
Country	US
Kind code	B1
Filing date	Jun 14, 2017
Priority date	Jun 14, 2017
Publication date	Sep 11, 2018
Grant date	Sep 11, 2018

Abstract

One illustrative method disclosed herein includes, among other things, forming first and second fins for a short channel FinFET device (“SCD”) and a long channel FinFET device (“LCD”), performing an oxidation process to form a sacrificial oxide material selectively on the channel portion of one of the first and second fins but not on the channel portion of the other of the first and second fins, removing the sacrificial oxide material from the fin on which it is formed so as to produce a reduced-size channel portion on that fin that is less than the initial size of the channel portion of the other non-oxidized fin, and forming first and second gate structures for the SCD and LCD devices.

First claim

What is claimed:

1. A method, comprising:
forming first and second fins for a short channel FinFET device and a long channel FinFET device, respectively, wherein a channel portion of each of said first and second fins have substantially a same initial size in terms of a vertical height and lateral width;
forming first and second replacement gate cavities on said short channel FinFET device and said long channel FinFET device, respectively, wherein said channel portion of each of said first and second fins is exposed within said first and second replacement gate cavities, respectively;
forming a gate insulation layer for said long channel FinFET device on said exposed channel portions of both said first and second fins;
performing a conformal deposition process to form a sacrificial protection layer comprised of a substantially non-oxidizable material, wherein said sacrificial protection layer substantially fills said first replacement gate cavity and forms conformally within said second replacement gate cavity;
removing all of said sacrificial protection layer from within said first replacement gate cavity so as to thereby expose said gate insulation layer for said long channel FinFET device within said first replacement gate cavity while leaving a portion of said sacrificial protection layer positioned within said second replacement gate cavity above said gate insulation layer for said long channel FinFET device within said second replacement gate cavity;
removing said exposed gate insulation layer for said long channel FinFET device within said first replacement gate cavity so as to thereby expose said initial sized channel portion of said first fin;
performing an oxidation process to form a sacrificial oxide material selectively on said channel portion of said first fin while not forming said sacrificial oxide material on said channel portion of said second fin;
removing said sacrificial oxide material from said first fin so as to produce a reduced-size channel portion on said first fin that is less than said initial size of said channel portion of said second fin;
forming a first gate structure around said reduced size channel portion of said first fin; and
forming a second gate structure around said initial sized channel portion of said second fin.

2. A method, comprising:
forming first and second fins for a short channel FinFET device and a long channel FinFET device, respectively, wherein a channel portion of each of said first and second fins have substantially a same initial size in terms of a vertical height and lateral width;
forming first and second replacement gate cavities on said short channel FinFET device and said long channel FinFET device, respectively, wherein said channel portion of each of said first and second fins is exposed within said first and second replacement gate cavities, respectively;
forming a gate insulation layer for said long channel FinFET device on said exposed channel portions of both said first and second fins;
performing a conformal deposition process to form a sacrificial protection layer comprised of a substantially non-oxidizable material, wherein said sacrificial protection layer substantially fills said first replacement gate cavity and forms conformally within said second replacement gate cavity;
removing all of said sacrificial protection layer from within said first replacement gate cavity so as to thereby expose said gate insulation layer for said long channel FinFET device within said first replacement gate cavity while leaving a portion of said sacrificial protection layer positioned within said second replacement gate cavity above said gate insulation layer for said long channel FinFET device within said second replacement gate cavity;
removing said exposed gate insulation layer for said long channel FinFET device within said first replacement gate cavity so as to thereby expose said initial sized channel portion of said first fin;
after exposing said initial sized channel portion of said first fin and with said portion of said sacrificial protection layer in position within said second replacement gate cavity above said gate insulation layer for said long channel FinFET device, performing an oxidation process to form a sacrificial oxide material selectively on said exposed initial sized channel portion of said first fin while not forming said sacrificial oxide material on said channel portion of said second fin;
removing said sacrificial oxide material from said first fin so as to produce a reduced-size channel portion on said first fin that is less than said initial size of said channel portion of said second fin;
forming a first gate structure around said reduced size channel portion of said first fin; and
forming a second gate structure around said initial sized channel portion of said second fin.

3. The method of claim 2 , wherein forming said first gate structure comprises forming said first gate structure in said first replacement gate cavity, and wherein forming said second gate structure comprises forming said second gate structure in said second replacement gate cavity.

4. The method of claim 2 , wherein said sacrificial protection layer comprises one of a metal, a metal compound, TiN or TaN.

5. The method of claim 2 , wherein, after removing said sacrificial oxide material from said first fin, the method further comprises removing said portion of said sacrificial protection layer positioned within said second replacement gate cavity above said gate insulation layer for said long channel FinFET device so as to thereby expose said gate insulation layer for said long channel FinFET device within said second replacement gate cavity.

6. The method of claim 5 , wherein, prior to forming said second gate structure, the method further comprises removing said exposed gate insulation layer for said long channel FinFET device from within said second replacement gate cavity so as to thereby expose said initial sized channel portion of said second fin.

7. The method of claim 5 , wherein forming said second gate structure comprises forming said second gate structure on said gate insulation layer for said long channel FinFET device positioned within said second replacement gate cavity.

8. A method, comprising:
forming first and second fins for a short channel FinFET device and a long channel FinFET device, respectively, wherein a channel portion of each of said first and second fins have substantially a same initial size in terms of a vertical height and lateral width;
forming first and second replacement gate cavities on said short channel FinFET device and said long channel FinFET device, respectively, wherein said channel portion of each of said first and second fins is exposed within said first and second replacement gate cavities, respectively;
forming a sacrificial gate insulation layer on said exposed channel portions of both said first and second fins;
performing a conformal deposition process to form a sacrificial protection layer comprised of a substantially non-oxidizable material, wherein said sacrificial protection layer substantially fills said first replacement gate cavity and forms conformally within said second replacement gate cavity;
removing all of said sacrificial protection layer from within said second replacement gate cavity so as to thereby expose said sacrificial gate insulation layer within said second replacement gate cavity while leaving a portion of said sacrificial protection layer positioned within said first replacement gate cavity above said sacrificial gate insulation layer within said first replacement gate cavity;
removing said exposed sacrificial gate insulation layer within said second replacement gate cavity so as to thereby expose said initial sized c

Assignees

• Globalfoundries Inc

Inventors

• Dou Xinyuan
• Zang Hui
• Yu Hong
• Wang Yanzhen

Classifications

• H01L29/66818 Primary

  Electricity · mapped topic

• H01L21/823431

  Electricity · mapped topic

• H01L29/785

  Electricity · mapped topic

• H10D84/834

  comprising FinFETs · CPC title

• H10D84/0158

  the components including FinFETs · CPC title