Testing apparatus and method for testing semiconductor chips

Patent metadata

Field	Value
Publication number	US-10060967-B2
Application number	US-201414474304-A
Country	US
Kind code	B2
Filing date	Sep 2, 2014
Priority date	Jan 28, 2014
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

A testing apparatus for a wafer having a plurality of semiconductor chips, each including one or more vias, includes an electron beam discharging unit, a detecting unit, and a controller. The electron beam discharging unit is configured to discharge an electron beam to a via of one of the semiconductor chips. The detecting unit generates a detection signal corresponding to a current flowing through the via. The controller is configured to record a value of the detection signal in association with a position of the semiconductor chip.

First claim

What is claimed is:

1. A testing apparatus for a wafer having a plurality of semiconductor chips in a matrix form, each of the semiconductor chips including a plurality of conductive vias, the apparatus comprising:
an electron beam discharging device including a plurality of tips arranged in a first direction of the matrix form, each of the tips being configured to discharge an electron beam to one of the conductive vias of one of the semiconductor chips, and to move along a second direction of the matrix form;
a detector configured to generate a detection signal corresponding to a current flowing through the conductive vias, the detector including a conductive sheet on which the semiconductor chips are placed so that the vias of the semiconductor chips are electrically connected to the conductive sheet; and
a controller configured to control the electron beam discharging device such that the electron beam is discharged from each of the tips at a different timing and record a value of the detection signal flowing through the conductive sheet in association with a position of the conductive vias.

2. The testing apparatus according to claim 1 , wherein
the controller is further configured to convert the value of the detection signal, and
the value of the detection signal associated with the position of the semiconductor chip is a converted value of the detection signal.

3. The testing apparatus according to claim 1 , wherein the controller includes a storage device in which the value of the detection signal is stored in association with the position of the one of the conductive vias.

4. The testing apparatus according to claim 1 , further comprising:
a stage on which the wafer is to be placed and that is configured to move the wafer along the surface direction thereof.

5. The testing apparatus according to claim 4 , wherein
the controller is further configured to adjust an orientation of the stage such that a column or a row direction of the semiconductor chips is parallel to a direction in which the tips move.

6. The testing apparatus according to claim 5 , wherein
the controller is further configured to adjust positions of the tips such that the tips pass above conductive vias arranged along the column or the row direction when the tips move.

7. The testing apparatus according to claim 1 , wherein the tips are configured to move in the second direction independently from each other.

8. A method for testing a wafer having a plurality of semiconductor chips in a matrix form, provided on a conductive sheet, each of the semiconductor chips including a plurality of conductive vias electrically connected to the conductive sheet, the method comprising:
discharging an electron beam, at a different timing, from each of a plurality of tips of an electron beam discharging device that are arranged in a first direction of the matrix form, to one of the conductive vias of one of the semiconductor chips, and moving the tips in a second direction of the matrix form;
detecting a current flowing through the conductive vias and the conductive sheet and generating a detection signal corresponding to the current; and
recording a value of the current in association with a position of the conductive vias.

9. The method according to claim 8 , further comprising:
converting the value of the detection signal,
wherein the value of the detection signal associated with the detected position is the converted value of the detection signal.

10. The method according to claim 8 , further comprising:
moving the plurality of tips along a surface direction of the wafer.

11. The method according to claim 10 ,
further comprising:
adjusting an orientation of a stage on which the wafer is placed such that a column or a row direction of the semiconductor chips is parallel to a direction in which the tips are moved.

12. The method according to claim 11 , further comprising:
adjusting positions of the tips such that the tips pass above the conductive vias arranged along the column or the row direction when the electron beam discharging device is moved.

13. The method according to claim 8 , wherein the moving of the electron beam discharging device comprises moving the tips in the second direction independently from each other.

14. A testing apparatus for a wafer having a plurality of semiconductor chips arranged in a matrix form, each of the semiconductor chips including a plurality of conductive vias, the apparatus comprising:
an electron beam discharging device having a plurality of tips arranged along a first direction of the matrix form, each of the tips being configured to move along a second direction of the matrix form and discharge an electron beam to conductive vias arranged along the second direction one at a time;
a plurality of detecting devices, each configured to generate a detection signal corresponding to a current flowing through each of the conductive vias to which an electron beam is discharged from one of the tips;
a conductive sheet on which the semiconductor chips are placed so that so that the vias of the semiconductor chips are electrically connected to the conductive sheet; and
a controller configured to control the electron beam discharging device such that the electron beam is discharged from each of the tips at a different timing and record a value of each detection signal flowing through the conductive sheet in association with a position of the corresponding conductive via.

15. The testing apparatus according to claim 14 , wherein
the detecting devices are electrically separated from each other.

16. The testing apparatus according to claim 14 , wherein
the tips are configured to move independently from each other.

Assignees

• Toshiba Memory Corp

Inventors

• Seto Motoshi

Classifications

• G01R31/2831

  Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates (G01R31/318511 takes precedence; testing during manufacture H10P74/00) · CPC title

• G01R31/2653 Primary

  using electron beams · CPC title