Manufacture method of AMOLED pixel drive circuit

Patent metadata

Field	Value
Publication number	US-10056445-B2
Application number	US-201615120745-A
Country	US
Kind code	B2
Filing date	Jun 27, 2016
Priority date	May 30, 2016
Publication date	Aug 21, 2018
Grant date	Aug 21, 2018

Abstract

The present invention provides a manufacture method of an AMOLED pixel driving circuit. The method utilizes the oxide semiconductor thin film transistor to be the switch thin film transistor of the AMOLED pixel driving circuit to reduce the leakage current of the switch thin film transistor, and the P type polysilicon thin film transistor manufactured by utilizing the Solid Phase Crystallization is employed to be the drive thin film transistor of the AMOLED pixel driving circuit to promote the mobility, the equality and the reliability of the drive thin film transistor, and utilizing the P type thin film transistor to be the drive thin film transistor can form the constant current type OLED element, which is more stable than the source follower type OLED formed by the N type thin film transistor, and meanwhile, the parasitic capacitance is decreased with the top gate structure.

First claim

What is claimed is:

1. A manufacture method of an AMOLED pixel driving circuit, comprising steps of:
step 1, providing a substrate, and performing clean and pre-cure to the substrate;
step 2, depositing a buffer layer on the substrate, and depositing an amorphous silicon layer on the buffer layer;
step 3, performing P type ion doping and rapid thermal annealing to the amorphous silicon layer to crystallize the same into a polysilicon layer, and patterning the polysilicon layer to form a drive thin film transistor active layer and a storage capacitor lower electrode;
step 4, depositing a gate insulation layer on the drive thin film transistor active layer, the storage capacitor lower electrode and the buffer layer;
step 5, depositing a first metal layer on the gate insulation layer, and patterning the first metal layer to form a drive thin film transistor gate above the drive thin film transistor active layer and a switch thin film transistor gate, which is separately aligned with the drive thin film transistor gate, and a storage capacitor upper electrode located above the storage capacitor lower electrode;
step 6, depositing an interlayer insulation layer on the drive thin film transistor gate, the switch thin film transistor gate, the storage capacitor upper electrode and the gate insulation layer;
step 7, depositing an oxide semiconductor layer on the interlayer insulation layer, and patterning the oxide semiconductor layer to form a switch thin film transistor active layer above the switch thin film transistor gate;
step 8, patterning the interlayer insulation layer and the gate insulation layer to form a first via and a second via penetrating the interlayer insulation layer and the gate insulation layer to respectively expose two ends of the drive thin film transistor active layer with the first via and the second via;
step 9, depositing a second metal layer on the interlayer insulation layer and the switch thin film transistor active layer, and patterning the second metal layer to form a drive thin film transistor source, a drive thin film transistor drain, a switch thin film transistor source and a switch thin film transistor drain;
wherein the drive thin film transistor source and the drive thin film transistor drain respectively contact with two ends of the drive thin film transistor active layer through the first via and the second via;
the switch thin film transistor source and the switch thin film transistor drain respectively contact with two ends of the switch thin film transistor active layer;
the switch thin film transistor gate and the drive thin film transistor source are electrically coupled.

2. The manufacture method of the AMOLED pixel driving circuit according to claim 1 , wherein the substrate in the step 1 is a glass substrate.

3. The manufacture method of the AMOLED pixel driving circuit according to claim 1 , wherein all materials of the buffer layer, the gate insulation layer and the interlayer insulation layer are one or more combinations of silicon oxide and silicon nitride.

4. The manufacture method of the AMOLED pixel driving circuit according to claim 1 , wherein both materials of the first metal layer and the second metal layer are molybdenum, aluminum or copper.

5. The manufacture method of the AMOLED pixel driving circuit according to claim 1 , wherein the P type ion doped in the step 3 is boron ion.

6. The manufacture method of the AMOLED pixel driving circuit according to claim 1 , wherein material of the oxide semiconductor in the step 7 is IGZO or ITZO.

7. The manufacture method of the AMOLED pixel driving circuit according to claim 1 , further comprising: step 10, sequentially forming a flat layer, a pixel electrode, a pixel definition layer and a pixel separation layer from top to bottom on the drive thin film transistor source, the drive thin film transistor drain, the switch thin film transistor source, the switch thin film transistor drain and the interlayer insulation layer.

8. The manufacture method of the AMOLED pixel driving circuit according to claim 7 , wherein a third via penetrating the flat layer is formed in a position on the flat layer corresponding to the drive thin film transistor drain; the pixel electrode contacts with the drive thin film transistor drain through the third via.

9. The manufacture method of the AMOLED pixel driving circuit according to claim 7 , wherein the pixel definition layer is formed with an opening at a position corresponding to the pixel electrode.

10. The manufacture method of the AMOLED pixel driving circuit according to claim 7 , wherein material of the pixel electrode is ITO.

11. A manufacture method of an AMOLED pixel driving circuit, comprising steps of:
step 1, providing a substrate, and performing clean and pre-cure to the substrate;
step 2, depositing a buffer layer on the substrate, and depositing an amorphous silicon layer on the buffer layer;
step 3, performing P type ion doping and rapid thermal annealing to the amorphous silicon layer to crystallize the same into a polysilicon layer, and patterning the polysilicon layer to form a drive thin film transistor active layer and a storage capacitor lower electrode;
step 4, depositing a gate insulation layer on the drive thin film transistor active layer, the storage capacitor lower electrode and the buffer layer;
step 5, depositing a first metal layer on the gate insulation layer, and patterning the first metal layer to form a drive thin film transistor gate above the drive thin film transistor active layer and a switch thin film transistor gate, which is separately aligned with the drive thin film transistor gate, and a storage capacitor upper electrode located above the storage capacitor lower electrode;
step 6, depositing an interlayer insulation layer on the drive thin film transistor gate, the switch thin film transistor gate, the storage capacitor upper electrode and the gate insulation layer;
step 7, depositing an oxide semiconductor layer on the interlayer insulation layer, and patterning the oxide semiconductor layer to form a switch thin film transistor active layer above the switch thin film transistor gate;
step 8, patterning the interlayer insulation layer and the gate insulation layer to form a first via and a second via penetrating the interlayer insulation layer and the gate insulation layer to respectively expose two ends of the drive thin film transistor active layer with the first via and the second via;
step 9, depositing a second metal layer on the interlayer insulation layer and the switch thin film transistor active layer, and patterning the second metal layer to form a drive thin film transistor source, a drive thin film transistor drain, a switch thin film transistor source and a switch thin film transistor drain;
wherein the drive thin film transistor source and the drive thin film transistor drain respectively contact with two ends of the drive thin film transistor active layer through the first via and the second via;
the switch thin film transistor source and the switch thin film transistor drain respectively contact with two ends of the switch thin film transistor active layer;
the switch thin film transistor gate and the drive thin film transistor source are electrically coupled;
wherein the substrate in the step 1 is a glass substrate;
wherein all materials of the buffer layer, the gate insulation layer and the interlayer insulation layer are one or more combinations of silicon oxide and silicon nitride;
wherein both materials of the first metal layer and the second metal layer are molybdenum, aluminum or copper.

12. The manufacture method of the AMOLED pixel driving circuit according

Assignees

• Shenzhen China Star Optoelect

Inventors

• Zhou Xingyu
• Zhang Xiaoxing
• Hsu Yuanjun
• Zhang Yadi

Classifications

• H10P70/10

  Cleaning before device manufacture, i.e. Begin-Of-Line process · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/3802

  Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth · CPC title

• H10P14/3454

  Amorphous · CPC title