Semiconductor device and method of manufacturing the same
US-2017148908-A1 · May 25, 2017 · US
US10050112B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10050112-B2 |
| Application number | US-201715423968-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 3, 2017 |
| Priority date | Feb 4, 2016 |
| Publication date | Aug 14, 2018 |
| Grant date | Aug 14, 2018 |
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A high electron mobility heterojunction transistor, including a first GaN layer; a second, p-doped GaN layer on top of the first layer, including magnesium as a p-type dopant, the concentration of which is at least equal to 5*1016 cm−3 and at most equal to 2*1018 cm−3, the thickness of the second GaN layer being between 20 and 50 nm; a third, n-doped GaN layer on top of the second GaN layer in order to form a depleted p-n junction; a fourth GaN layer, which is not intentionally doped, on top of the third GaN layer; a semiconductor layer plumb with the fourth GaN layer, which is not intentionally doped, in order to form an electron gas layer.
Opening claim text (preview).
The invention claimed is: 1. A high electron mobility heterojunction transistor, comprising: a first GaN layer; a second, p-doped GaN layer formed on top of the first GaN layer, this second GaN layer including magnesium forming a p-type dopant, the concentration of magnesium in the second GaN layer being at least equal to 5*10 16 cm −3 and at most equal to 2*10 18 cm −3 , the thickness of said second GaN layer being between 20 and 50 nm; a third, n-doped GaN layer formed on top of the second GaN layer so as to form a depleted p-n junction; a fourth GaN layer, which is not intentionally doped, formed on top of the third GaN layer; a semiconductor layer formed plumb with the fourth GaN layer, which is not intentionally doped, in order to form an electron gas layer. 2. The heterojunction transistor according to claim 1 , in which the third GaN layer includes silicon forming an n-type dopant. 3. The heterojunction transistor according to claim 2 , in which the concentration of silicon in the third GaN layer is at least equal to 1.5*10 16 cm −3 . 4. The heterojunction transistor according to claim 2 , in which the concentration of silicon in the third GaN layer is at most equal to 2*10 18 cm −3 . 5. The heterojunction transistor according to claim 1 , in which the thickness of said third GaN layer is between 10 and 100 nm. 6. The heterojunction transistor according to claim 1 , in which the dopant concentration of said fourth layer is less than 1*10 16 cm −3 . 7. The heterojunction transistor according to claim 1 , in which the thickness of said fourth layer is between 50 and 100 nm. 8. The heterojunction transistor according to claim 1 , in which the carbon concentration of said first GaN layer is greater than that of the second and third GaN layers. 9. The heterojunction transistor according to claim 1 , in which said semiconductor layer includes AlGaN. 10. A high electron mobility heterojunction transistor, comprising: a first GaN layer; a second, p-doped GaN layer formed on top of the first GaN layer, this second GaN layer including magnesium forming a p-type dopant, the concentration of magnesium in the second GaN layer being at least equal to 5*10 16 cm −3 and at most equal to 2*10 18 cm −3 , the thickness of said second GaN layer being between 20 and 50 nm; a third, n-doped GaN layer formed on top of the second GaN layer so as to form a depleted p-n junction; a fourth GaN layer, which is not intentionally doped, formed on top of the third GaN layer; a semiconductor layer formed plumb with the fourth GaN layer, which is not intentionally doped, in order to form an electron gas layer, and further comprising another semiconductor layer, made of AlN, the thickness of which is between 0.5 and 2 nm, positioned between the fourth GaN layer and said semiconductor layer formed plumb with the fourth GaN layer.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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