Silicon photonics integration method and structure

US10026852B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10026852-B2
Application numberUS-201715463189-A
CountryUS
Kind codeB2
Filing dateMar 20, 2017
Priority dateDec 23, 2014
Publication dateJul 17, 2018
Grant dateJul 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a semiconductor structure, comprising: forming a photodetector on and over an optical waveguide; forming at least one encapsulating layer over and around the photodetector; and forming a conformal sealing layer on the at least one encapsulating layer, wherein the conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. 2. The method of claim 1 , wherein: thermally crystallizing the photodetector material forms the crack in the at least one encapsulating layer; and the conformal sealing layer plugs the crack. 3. The method of claim 1 , wherein the forming the conformal sealing layer comprises forming a silicon nitride layer using rapid thermal chemical vapor deposition. 4. The method of claim 1 , wherein the conformal sealing layer is formed over a transistor, and further comprising: masking a first portion of the conformal sealing layer over the photodetector; and removing a second portion of the conformal sealing layer from over the transistor. 5. The method of claim 4 , further comprising: forming silicide on the transistor after the removing a second portion of the conformal sealing layer from over the transistor; and forming a barrier layer on both the transistor and the first portion of the conformal sealing layer over the photodetector. 6. The method of claim 5 , wherein: the forming the conformal sealing layer comprises forming a silicon nitride layer using rapid thermal chemical vapor deposition; and the forming the barrier layer comprises forming another silicon nitride layer using plasma enhanced chemical vapor deposition. 7. The method of claim 1 , wherein the conformal sealing layer is formed over a laser grating coupler, and further comprising: forming a barrier layer on both a first portion of the conformal sealing layer over the photodetector and a second portion of the conformal sealing layer over the laser grating coupler; and removing a portion of the barrier layer from over the laser grating coupler. 8. The method of claim 1 , wherein the conformal sealing layer is formed over a first device, a second device, and the at least one encapsulating layer, and further comprising: removing a portion of the conformal sealing layer from over the first device; forming a barrier layer on the first device and on the conformal sealing layer over both the second device and the at least one encapsulating layer; and removing a portion of the barrier layer from over the second device. 9. The method of claim 1 , wherein the conformal sealing layer is formed over at least one device. 10. The method of claim 9 , further comprising forming a nitride layer on the at least one device prior to the forming the conformal sealing layer, wherein the conformal sealing layer is formed on the nitride layer. 11. The method of claim 10 , wherein the at least one device comprises a resistor.

Assignees

Inventors

Classifications

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • in the presence of a plasma [PECVD] · CPC title

  • using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329) · CPC title

  • of metal-silicide materials · CPC title

  • Photovoltaic [PV] energy · CPC title

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What does patent US10026852B2 cover?
Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating laye…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01L31/0203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).