Non-volatile memory with read disturb detection for open blocks

Patent metadata

Field	Value
Publication number	US-10026488-B2
Application number	US-201615240188-A
Country	US
Kind code	B2
Filing date	Aug 18, 2016
Priority date	Aug 18, 2016
Publication date	Jul 17, 2018
Grant date	Jul 17, 2018

Abstract

A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open word line of the particular block. The number of errors in the sensed data is determined. If the number of errors is greater than a limit, then the system takes an action to mitigate the read disturb.

First claim

What is claimed is:

1. A non-volatile storage apparatus, comprising:
a plurality of non-volatile memory cells; and
a control circuit in communication with the memory cells, the control circuit configured to determine that a block of non-volatile memory cells has been subjected to a minimum number of open block read operations, the control circuit further configured to sense memory cells connected to an open word line of the block and to determine a number of errors based on the sensing in response to the block having been subjected to the minimum number of open block read operations, the control circuit configured to scrub data of the block if the number of errors exceeds a limit.

2. A non-volatile storage apparatus according to claim 1 , wherein:
the control circuit is configured to determine that the particular block is an open block.

3. A non-volatile storage apparatus according to claim 1 , wherein:
the control circuit is configured to determine a number of errors based on the sensing by determining how many memory cells connected to the open word line are not in an erased condition.

4. A non-volatile storage apparatus according to claim 1 , wherein:
the control circuit is configured to determine whether the particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations in response to performing a read operation for the particular block.

5. A non-volatile storage apparatus according to claim 1 , wherein:
the control circuit is configured to sense information for memory cells connected to an open word line of the particular block by performing a read operation for an open word line that is adjacent a boundary word line.

6. A non-volatile storage apparatus according to claim 1 , wherein:
the control circuit maintains different open block read counters for different blocks.

7. A non-volatile storage apparatus according to claim 1 , wherein:
the control circuit maintains a read counter for the particular block; and
the control circuit is configured to determine whether the particular block has been subjected to the minimum number of open block read operations by comparing the read counter to a read counter threshold and determining if the particular block is an open block if the read counter is greater than the read counter threshold.

8. A non-volatile storage apparatus according to claim 1 , wherein:
the plurality of non-volatile memory cells are positioned on a first integrated circuit; and
the control circuit includes a Controller on a second integrated circuit, the Controller is configured to determine whether the particular block has been subjected to the minimum number of open block read operations.

9. A method of operating non-volatile storage, comprising:
determining that a particular block of non-volatile memory cells is an open block and has been subjected to a minimum number of read operations;
causing sensing of memory cells connected to an open word line of the particular block;
determining a number of unerased memory cells based on the reading; and
scrubbing data for the particular block if the number of unerased memory cells is greater than a limit.

10. A method according to claim 9 , wherein:
the determining the number of unerased memory cells based on the reading includes determining a number of memory cells having a threshold voltage greater than a compare value.

11. A method according to claim 9 , wherein:
the determining that the particular block of non-volatile memory cells is an open block includes determining that the particular block has at least one word line for which no memory cells connected to the one word line have been subjected to programming since a previous block erase.

12. A method according to claim 9 , wherein the scrubbing data comprises:
causing reading all of the data for the particular block, including subjecting the data to an error correction process; and
causing re-programming of the data read for the particular block to a new block.

13. A method according to claim 9 , further comprising:
causing reading of data from a plurality of memory cells in the particular block of non-volatile memory cells, the determining that the particular block is an open block and has been subjected to the minimum number of read operations is performed in response to the reading.

14. A method according to claim 13 , further comprising:
incrementing an open block read counter if the particular block of memory cells is an open block, the determining that the particular block has been subjected to the minimum number of read operations includes comparing the open block read counter to the threshold.

15. An apparatus, comprising:
an electrical interface to one or more non-volatile memory circuits; and
one or more processors connected to the interface and adapted to be in communication with the one or more non-volatile memory circuits, the one or more processors are configured to determine that a particular block of non-volatile memory cells in the one or more non-volatile memory circuits is an open block and has been subjected to a minimum number of read operations since a count started, the one or more processors are configured to cause sensing of memory cells connected to an open word line of the particular block, the one or more processors are configured to calculate a number of error conditions in the sensed memory cells, the one or more processors are configured to scrub data for the particular block if the number of error conditions is greater than a limit.

16. An apparatus according to claim 15 , wherein:
the open word line of the particular block is adjacent a closed word line of the particular block;
the one or more processors are configured to calculate the number of error conditions in the sensed memory cells by determining how many of the memory cells connected to the open word line have a threshold voltage greater than a compare voltage; and
the one or more processors are configured to scrub data for the particular block by re-programming all programmed data for the particular block.

Assignees

• Sandisk Technologies Llc

Inventors

• Reusswig Phil
• Lai Joanna
• Raghu Deepak
• Shah Grishma
• Yang Nian Niles

Classifications

• G11C29/52

  Protection of memory contents; Detection of errors in memory contents · CPC title

• G11C2029/0409

  Online test · CPC title

• G11C29/028

  with adaption or trimming of parameters · CPC title

• G11C11/5642

  Sensing or reading circuits; Data output circuits · CPC title

• G11C29/50004

  of threshold voltage · CPC title