Deep neural network on field-programmable gate array
US-11907828-B2 · Feb 20, 2024 · US
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Polig Raphael patents
Polig Raphael is listed as an inventor on 35 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Polig Raphael |
| Total patents | 35 |
| First publication | Feb 24, 2015 |
| Latest publication | Feb 20, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Random sequence generation for gene simulations
US-11521705-B2 · Dec 6, 2022 · US
Interactive-aware clustering of stable states
US-11515005-B2 · Nov 29, 2022 · US
Bit-serial linear algebra processor
US-11275713-B2 · Mar 15, 2022 · US
Native code generation for cloud services
US-11150926-B2 · Oct 19, 2021 · US
Learning framework for software-hardware model generation and verification
US-10970449-B2 · Apr 6, 2021 · US
Deep neural network on field-programmable gate array
US-2021064975-A1 · Mar 4, 2021 · US
Hardware compilation of cascaded grammars
US-10803346-B2 · Oct 13, 2020 · US
Index based memory access using single instruction multiple data unit
US-10776118-B2 · Sep 15, 2020 · US
Native Code Generation for Cloud Services
US-2020272487-A1 · Aug 27, 2020 · US
Recent patents
Latest publications not already listed above.
Interactive-aware clustering of stable states
US-2020273539-A1 · Aug 27, 2020 · US
Random sequence generation for gene simulations
US-2020089842-A1 · Mar 19, 2020 · US
Bit-serial linear algebra processor
US-2019377707-A1 · Dec 12, 2019 · US
Precision data access using differential data
US-10430326-B2 · Oct 1, 2019 · US
Precision data access using differential data
US-10430325-B2 · Oct 1, 2019 · US
Hardware compilation of cascaded grammars
US-2019163999-A1 · May 30, 2019 · US
Learning framework for software-hardware model generation and verification
US-2019087513-A1 · Mar 21, 2019 · US
Hardware compilation of cascaded grammars
US-10198646-B2 · Feb 5, 2019 · US
Linear FE system solver with dynamic multi-grip precision
US-10025754-B2 · Jul 17, 2018 · US
Non-deterministic finite state machine module for use in a regular expression matching system
US-9983876-B2 · May 29, 2018 · US
Index based memory access
US-2018074962-A1 · Mar 15, 2018 · US
Accelerated content analytics based on a hierarchical data-flow-graph representation
US-2018018152-A1 · Jan 18, 2018 · US
Hardware compilation of cascaded grammars
US-2018005060-A1 · Jan 4, 2018 · US
Accelerated content analytics based on a hierarchical data-flow-graph representation
US-9858056-B1 · Jan 2, 2018 · US
Interposer for dynamic mapping of API calls
US-9703573-B1 · Jul 11, 2017 · US
Differential data access
US-2017097883-A1 · Apr 6, 2017 · US
Adaptable and extensible runtime and system for heterogeneous computer systems
US-9557975-B2 · Jan 31, 2017 · US
Adaptable and extensible runtime and system for heterogeneous computer systems
US-9557976-B2 · Jan 31, 2017 · US
Linear fe system solver with dynamic multi-grid precision
US-2017024356-A1 · Jan 26, 2017 · US
SRAM array comprising multiple cell cores
US-9384823-B2 · Jul 5, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 35 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F8/451 | 6 |
| G06F8/4441 | 6 |
| G06F8/433 | 6 |
| G06F9/4552 | 6 |
| G06F17/16 | 4 |