Hierarchical parallelism in a network of distributed neural network cores
US-12481861-B2 · Nov 25, 2025 · US
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Penner Hartmut patents
Penner Hartmut is listed as an inventor on 45 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Penner Hartmut |
| Total patents | 45 |
| First publication | Apr 5, 2018 |
| Latest publication | Nov 25, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Multi-agent instruction execution engine for neural inference processing
US-12406174-B2 · Sep 2, 2025 · US
Scheduler for mapping neural networks onto an array of neural cores in an inference processing unit
US-12387082-B2 · Aug 12, 2025 · US
Data representation for dynamic precision in neural network cores
US-12182687-B2 · Dec 31, 2024 · US
Networks for distributing parameters and data to neural network compute cores
US-12165050-B2 · Dec 10, 2024 · US
Defect resistant designs for location-sensitive neural network processor arrays
US-12067472-B2 · Aug 20, 2024 · US
Runtime reconfigurable neural network processor core
US-12056598-B2 · Aug 6, 2024 · US
Parallel computational architecture with reconfigurable core-level and vector-level parallelism
US-11847553-B2 · Dec 19, 2023 · US
Instruction distribution in an array of neural network cores
US-11663461-B2 · May 30, 2023 · US
Distributed, event-based computation using neuromorphic cores
US-11645501-B2 · May 9, 2023 · US
Recent patents
Latest publications not already listed above.
Runtime reconfigurable neural network processor core
US-2023062217-A1 · Mar 2, 2023 · US
Runtime reconfigurable neural network processor core
US-11501140-B2 · Nov 15, 2022 · US
Symbolic validation of neuromorphic hardware
US-2022129436-A1 · Apr 28, 2022 · US
Compound instruction set architecture for a neural inference chip
US-11263011-B2 · Mar 1, 2022 · US
Data distribution in an array of neural network cores
US-11238347-B2 · Feb 1, 2022 · US
Massively parallel neural inference computing elements
US-11010662-B2 · May 18, 2021 · US
Providing remote, reliant and high performance PCI express device in cloud computing environments
US-10936535-B2 · Mar 2, 2021 · US
Selective multicast delivery on a bus-based interconnect
US-10834024-B2 · Nov 10, 2020 · US
Extending existing storage devices in virtualized environments
US-10768862-B2 · Sep 8, 2020 · US
Massively parallel neural inference computing elements
US-2020202205-A1 · Jun 25, 2020 · US
Compound instruction set architecture for a neural inference chip
US-2020167158-A1 · May 28, 2020 · US
Extending existing storage devices in virtualized environments
US-10628087-B2 · Apr 21, 2020 · US
Networks for distributing parameters and data to neural network compute cores
US-2020117988-A1 · Apr 16, 2020 · US
Data representation for dynamic precision in neural network cores
US-2020117981-A1 · Apr 16, 2020 · US
Multi-agent instruction execution engine for neural inference processing
US-2020117465-A1 · Apr 16, 2020 · US
Massively parallel neural inference computing elements
US-10621489-B2 · Apr 14, 2020 · US
Data distribution in an array of neural network cores
US-2020104718-A1 · Apr 2, 2020 · US
Selective multicast delivery on a bus-based interconnect
US-2020106717-A1 · Apr 2, 2020 · US
Scheduler for mapping neural networks onto an array of neural cores in an inference processing unit
US-2020042856-A1 · Feb 6, 2020 · US
Hierarchical parallelism in a network of distributed neural network cores
US-2020019836-A1 · Jan 16, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 45 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06N3/063 | 35 |
| G06N3/0464 | 25 |
| G06N3/048 | 20 |
| G06N3/045 | 20 |
| G06N3/04 | 17 |