BiSb topological insulator with seed layer or interlayer to prevent Sb diffusion and promote BiSb (012) orientation
US-12527232-B2 · Jan 13, 2026 · US
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Nguyen Thao A patents
Nguyen Thao A is listed as an inventor on 24 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Nguyen Thao A |
| Total patents | 24 |
| First publication | Nov 17, 2020 |
| Latest publication | Jan 13, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Matrix-vector multiplication using SOT-based non-volatile memory cells
US-12314842-B2 · May 27, 2025 · US
BiSb topological insulator with novel buffer layer that promotes a BiSb (012) orientation
US-11694713-B2 · Jul 4, 2023 · US
BiSb Topological Insulator with Seed Layer or Interlayer to Prevent Sb Diffusion and Promote BiSb (012) Orientation
US-2023027086-A1 · Jan 26, 2023 · US
BiSb topological insulator with seed layer or interlayer to prevent sb diffusion and promote BiSb (012) orientation
US-11489108-B2 · Nov 1, 2022 · US
Dual writer for advanced magnetic recording
US-11430469-B2 · Aug 30, 2022 · US
Optimized dual thermal fly-height design for dual writers for advanced magnetic recording
US-11404080-B2 · Aug 2, 2022 · US
SOT-based spin torque oscillators for oscillatory neural networks
US-11393516-B2 · Jul 19, 2022 · US
Sot-based spin torque oscillators for oscillatory neural networks
US-2022122647-A1 · Apr 21, 2022 · US
Apparatus and methods for magnetic memory devices with magnetic assist layer
US-11283008-B1 · Mar 22, 2022 · US
Recent patents
Latest publications not already listed above.
Magnetic sensor bridge using dual free layer
US-11275130-B2 · Mar 15, 2022 · US
Apparatus and methods for magnetic memory devices with magnetic assist layer
US-2022069202-A1 · Mar 3, 2022 · US
Matrix-vector multiplication using sot-based non-volatile memory cells
US-2022044103-A1 · Feb 10, 2022 · US
Optimized Dual Thermal Fly-Height Design For Dual Writers For Advanced Magnetic Recording
US-2022005502-A1 · Jan 6, 2022 · US
Magnetic Sensor Bridge Using Dual Free Layer
US-2021405131-A1 · Dec 30, 2021 · US
Dual Writer For Advanced Magnetic Recording
US-2021390976-A1 · Dec 16, 2021 · US
BiSb Topological Insulator with Seed Layer or Interlayer to Prevent Sb Diffusion and Promote BiSb (012) Orientation
US-2021336127-A1 · Oct 28, 2021 · US
Dual writer for advanced magnetic recording
US-11127417-B2 · Sep 21, 2021 · US
BiSb Topological Insulator with Novel Buffer Layer that Promotes a BiSb (012) Orientation
US-2021249038-A1 · Aug 12, 2021 · US
Optimized dual thermal fly-height design for dual writers for advanced magnetic recording
US-11087789-B1 · Aug 10, 2021 · US
Dual writer for advanced magnetic recording
US-2021158839-A1 · May 27, 2021 · US
Dual writer for advanced magnetic recording
US-10878841-B1 · Dec 29, 2020 · US
Helical coils design and process for dual writer magnetic recording
US-10872625-B1 · Dec 22, 2020 · US
Dual writer designs with SOT and STT assisted recording
US-10839831-B1 · Nov 17, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Western Digital Tech Inc | 24 |
| Tokyo Inst Tech | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10B61/00 | 10 |
| H10N52/00 | 10 |
| H10N50/10 | 10 |
| H10N52/80 | 10 |
| G11B5/3133 | 10 |