Data processing system having a write request network and a write data network
US-10346089-B2 · Jul 9, 2019 · US
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Larson John E patents
Larson John E is listed as an inventor on 10 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Larson John E |
| Total patents | 10 |
| First publication | Jun 16, 2016 |
| Latest publication | Jul 9, 2019 |
Notable patents
Publications ranked by popularity score, then publication date.
Coherent memory interleaving with uniform latency
US-9977750-B2 · May 22, 2018 · US
Data processing system having a write request network and a write data network
US-2017249103-A1 · Aug 31, 2017 · US
Methods and systems for controlling ordered write transactions to multiple devices using switch point networks
US-9665518-B2 · May 30, 2017 · US
Efficient coherency response mechanism
US-9632933-B2 · Apr 25, 2017 · US
Switch point having look-ahead bypass
US-9497141-B2 · Nov 15, 2016 · US
Piggy-back snoops for non-coherent memory transactions within distributed processing systems
US-9448741-B2 · Sep 20, 2016 · US
Switch point having look-ahead bypass
US-2016241492-A1 · Aug 18, 2016 · US
Efficient coherency response mechanism
US-2016224468-A1 · Aug 4, 2016 · US
Coherent memory interleaving with uniform latency
US-2016170916-A1 · Jun 16, 2016 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Freescale Semiconductor Inc | 9 |
| Nxp Usa Inc | 4 |
| Deshpande Sanjay R | 2 |
| Larson John E | 2 |
| Morales Fernando A | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F13/4022 | 5 |
| G06F12/0831 | 4 |
| G06F2212/621 | 4 |
| G06F2212/1016 | 3 |
| H04L47/821 | 2 |