Efficient coherency response mechanism

Patent metadata

Field	Value
Publication number	US-9632933-B2
Application number	US-201514612861-A
Country	US
Kind code	B2
Filing date	Feb 3, 2015
Priority date	Feb 3, 2015
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

A plurality of processing units are interconnected by a coherency network in accordance with a directed spanning tree. Each processing unit that is a leaf of the directed spanning tree includes processing circuitry to provide a coherency response in response to a snoop request. Each processing unit which is not a root or leaf of the directed spanning tree includes switch point circuitry having one or more ingress ports coupled to neighboring processing units in accordance with the directed spanning tree. The switch point circuitry includes a coherency tracking table configured to store a combined coherency response in response to a particular snoop request based on one or more coherency responses received at the one or more ingress ports from the neighboring processing units.

First claim

What is claimed is:

1. A data processing system, comprising:
a plurality of processing units interconnected by a coherency network in accordance with a directed spanning tree in which the plurality of processing units comprises a first processing unit characterized as a root of the directed spanning tree, a first set of processing units each characterized as a leaf of the directed spanning tree, and a remaining set of processing units, exclusive of the first processing unit and first set of processing units, wherein
each processing unit of the first set comprises:
processing circuitry configured to provide a coherency response in response to a snoop request, and

each processing unit of the remaining set comprises:
switch point circuitry comprising:
one or more ingress ports coupled to neighboring processing units in accordance with the directed spanning tree,
a coherency tracking table configured to store a combined coherency response in response to a particular snoop request based on one or more coherency responses received at the one or more ingress ports from the neighboring processing units,
an egress port toward the first processing unit characterized as the root of the directed spanning tree, wherein the egress port is coupled to the coherency network, and
coherency logic configured to provide the combined coherency response for the particular snoop request on the egress port when a corresponding coherency response for the particular snoop request has been received from every one of the neighboring processing units in accordance with the directed spanning tree.

2. The data processing system of claim 1 , wherein the one or more coherency responses received at the one or more ingress ports are provided in response to the particular snoop request and the one or more coherency responses are used to form the combined coherency response.

3. The data processing system of claim 1 , wherein the one or more coherency responses are received at different times.

4. The data processing system of claim 1 , wherein the coherency tracking table of each switch point circuitry in the remaining set of processing units comprises:
a plurality of entries, each entry is associated with a corresponding snoop request and is configured to store:
a bit field associated with a corresponding ingress port of the one or more ingress ports to indicate whether a corresponding coherency response has been received for the corresponding snoop request on the corresponding ingress port, and
a combined coherency response field that is updated when a new coherency response is received at the one or more ingress ports for the corresponding snoop request.

5. The data processing system of claim 4 , wherein the plurality of entries are ordered in accordance with an order in which the corresponding snoop requests were issued.

6. The data processing system of claim 1 , wherein the egress port is coupled to an immediately adjacent processing unit in the coherency network, exclusive of the first set of processing units.

7. The data processing system of claim 1 , wherein the one or more coherency responses comprises at least one or more of: a received combined coherency response from a neighboring one of the remaining set of processing units in accordance with the directed spanning tree, and a received coherency response from a neighboring one of the first set of processing units in accordance with the directed spanning tree.

8. The data processing system of claim 1 , further comprising:
a second plurality of processing units interconnected by a second coherency network in accordance with a second directed spanning tree that is different from the first directed spanning tree, wherein the first plurality of processing units and the second plurality of processing units include an overlapping set of processing units.

9. The data processing system of claim 8 , wherein each processing unit of the overlapping set of processing units comprises switch point circuitry including:
a first coherency tracking table configured to store combined coherency responses in response to corresponding snoop requests communicated on the coherency network; and
a second coherency tracking table configured to store combined coherency responses in response to corresponding snoop requests communicated on the second coherency network.

10. The data processing system of claim 9 , wherein the switch point circuitry in each processing unit of the overlapping set of processing units includes a first set of ingress ports coupled to the coherency network and a second set of ingress ports coupled to the second coherency network.

11. A data processing system, comprising:
a coherency network;
an ordering point processing unit; and
a plurality of processing units, wherein the ordering point processing unit and the plurality of processing units are interconnected by the coherency network, wherein the plurality of processing units comprises a set of trunk processing units, wherein
each of the set of trunk processing units comprises:
switch point circuitry comprising:
one or more ingress ports coupled to the coherency network,
a coherency tracking table configured to store a combined coherency response in response to a particular snoop request based on one or more coherency responses received at the one or more ingress ports,
an egress port toward the ordering point processing unit, wherein the egress port is coupled to the coherency network, and
coherency logic configured to provide the combined coherency response for the particular snoop request on the egress port when a corresponding coherency response for the particular snoop request has been received from every one of the one or more ingress ports.

12. The data processing system of claim 11 , wherein the one or more coherency responses received at the one or more ingress ports are provided in response to the particular snoop request and the one or more coherency responses are used to form the combined coherency response.

13. The data processing system of claim 11 , wherein the one or more coherency responses are received at different times.

14. The data processing system of claim 11 , wherein the coherency tracking table of each switch point circuitry in the plurality of processing units comprises:
a plurality of entries, each entry is associated with a corresponding snoop request and is configured to store:
a bit field associated with a corresponding ingress port of the one or more ingress ports to indicate whether a corresponding coherency response has been received for the corresponding snoop request on the corresponding ingress port, and
a combined coherency response field that is updated when a new coherency response is received at the one or more ingress ports for the corresponding snoop request.

15. The data processing system of claim 14 , wherein the plurality of entries are ordered in accordance with an order in which the corresponding snoop requests were issued by the ordering point processing unit.

16. In a data processing system having multiple processing units interconnected via a coherency network in accordance with a directed spanning tree, a method comprising:
receiving, at a processing unit from each of one or more ingress neighboring processing units in accordance with the directed spanning tree, a corresponding coherency response responsive to a first snoop request;
updating a first entry corresponding to the first snoop request in a coherency tracking table of the processing unit, wherein the updating comprises accumulating each corresponding coherency response into a c

Assignees

• Freescale Semiconductor Inc
• Nxp Usa Inc

Inventors

• Deshpande Sanjay R
• Larson John E
• Morales Fernando A
• Nguyen Thang Q

Classifications

• G06F12/0831

  using a bus scheme, e.g. with bus monitoring or watching means · CPC title

• G06F12/0815 Primary

  Cache consistency protocols · CPC title

• G06F2212/1016

  Performance improvement · CPC title

• G06F12/0813 Primary

  with a network or matrix configuration · CPC title

• G06F2212/154

  Networked environment · CPC title