Providing variable interpretation of usefulness indicators for memory tables in processor-based systems
US-10725782-B2 · Jul 28, 2020 · US
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Krishna Anil patents
Krishna Anil is listed as an inventor on 30 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Krishna Anil |
| Total patents | 30 |
| First publication | Jan 15, 2015 |
| Latest publication | Jul 28, 2020 |
Notable patents
Publications ranked by popularity score, then publication date.
Reconfiguring execution pipelines of out-of-order (OOO) computer processors based on phase training and prediction
US-10635446-B2 · Apr 28, 2020 · US
Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phase
US-10551896-B2 · Feb 4, 2020 · US
Reduced logic level operation folding of context history in a history register in a prediction system for a processor-based system
US-10437592-B2 · Oct 8, 2019 · US
Providing efficient recursion handling using compressed return address stacks (CRASs) in processor-based systems
US-10331447-B2 · Jun 25, 2019 · US
Select in-order instruction pick using an out of order instruction picker
US-2019087184-A1 · Mar 21, 2019 · US
Providing variable interpretation of usefulness indicators for memory tables in processor-based systems
US-2019079772-A1 · Mar 14, 2019 · US
Caching instruction block header data in block architecture processor-based systems
US-2019065060-A1 · Feb 28, 2019 · US
PROVIDING EFFICIENT RECURSION HANDLING USING COMPRESSED RETURN ADDRESS STACKS (CRASs) IN PROCESSOR-BASED SYSTEMS
US-2019065197-A1 · Feb 28, 2019 · US
Reduced logic level operation folding of context history in a history register in a prediction system for a processor-based system
US-2019065196-A1 · Feb 28, 2019 · US
Recent patents
Latest publications not already listed above.
Storing narrow produced values for instruction operands directly in a register map in an out-of-order processor
US-10108417-B2 · Oct 23, 2018 · US
Performing distributed branch prediction using fused processor cores in processor-based systems
US-2018081690-A1 · Mar 22, 2018 · US
Memory violation prediction
US-2018081806-A1 · Mar 22, 2018 · US
Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phase
US-2018074568-A1 · Mar 15, 2018 · US
Branch target predictor
US-2017371669-A1 · Dec 28, 2017 · US
Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phase
US-9851774-B2 · Dec 26, 2017 · US
Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phase
US-2017192484-A1 · Jul 6, 2017 · US
Method and apparatus for effective clock scaling at exposed cache stalls
US-2017090508-A1 · Mar 30, 2017 · US
Reconfiguring execution pipelines of out-of-order (ooo) computer processors based on phase training and prediction
US-2017090930-A1 · Mar 30, 2017 · US
Hierarchical register file system
US-2017060593-A1 · Mar 2, 2017 · US
Cache way prediction using partial tags
US-2017060750-A1 · Mar 2, 2017 · US
Storing narrow produced values for instruction operands directly in a register map in an out-of-order processor
US-2017046154-A1 · Feb 16, 2017 · US
Method and apparatus for selective renaming in a microprocessor
US-9471325-B2 · Oct 18, 2016 · US
Performance measurement of hardware accelerators
US-9424159-B2 · Aug 23, 2016 · US
Out-of-order checkpoint reclamation in a checkpoint processing and recovery core microarchitecture
US-9262170-B2 · Feb 16, 2016 · US
Physical register scrubbing in a computer microprocessor
US-2015268959-A1 · Sep 24, 2015 · US
Write bandwidth management for flash devices
US-9081504-B2 · Jul 14, 2015 · US
Optimizing a cache back invalidation policy
US-9043556-B2 · May 26, 2015 · US
Performance measurement of hardware accelerators
US-2015106816-A1 · Apr 16, 2015 · US
Method and apparatus for selective renaming in a microprocessor
US-2015019843-A1 · Jan 15, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Qualcomm Inc | 25 |
| IBM | 4 |
| Krishna Anil | 2 |
| Balakrishnan Ganesh | 2 |
| Bell Gordon B | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| Y02D10/00 | 9 |
| G06F9/3806 | 6 |
| G06F9/3836 | 6 |
| G06F9/3861 | 6 |
| G06F9/384 | 6 |