High performance interconnect
US-2025321910-A1 · Oct 16, 2025 · US
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Johnson Simon P patents
Johnson Simon P is listed as an inventor on 98 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Johnson Simon P |
| Total patents | 98 |
| First publication | Mar 3, 2015 |
| Latest publication | Oct 16, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
High performance interconnect
US-2025225090-A1 · Jul 10, 2025 · US
Processors, methods, systems, and instructions to support live migration of protected containers
US-12242391-B2 · Mar 4, 2025 · US
High performance interconnect
US-12197357-B2 · Jan 14, 2025 · US
High performance interconnect
US-12189550-B2 · Jan 7, 2025 · US
Processors, methods, systems, and instructions to support live migration of protected containers
US-2024184717-A1 · Jun 6, 2024 · US
Supporting secure memory intent
US-11995001-B2 · May 28, 2024 · US
High performance interconnect
US-2024012772-A1 · Jan 11, 2024 · US
Processors, methods, systems, and instructions to support live migration of protected containers
US-11782849-B2 · Oct 10, 2023 · US
High performance interconnect
US-11741030-B2 · Aug 29, 2023 · US
Recent patents
Latest publications not already listed above.
Supporting secure memory intent
US-2023042288-A1 · Feb 9, 2023 · US
Platform attestation and registration for servers
US-11489678-B2 · Nov 1, 2022 · US
Supporting secure memory intent
US-11392507-B2 · Jul 19, 2022 · US
High performance interconnect
US-2022114122-A1 · Apr 14, 2022 · US
High performance interconnect
US-11269793-B2 · Mar 8, 2022 · US
Processors, methods, systems, and instructions to support live migration of protected containers
US-2021406201-A1 · Dec 30, 2021 · US
Supporting secure memory intent
US-2021255962-A1 · Aug 19, 2021 · US
Processors, methods, systems, and instructions to support live migration of protected containers
US-11055236-B2 · Jul 6, 2021 · US
Host-convertible secure enclaves in memory that leverage multi-key total memory encryption with integrity
US-11030120-B2 · Jun 8, 2021 · US
High performance interconnect
US-2021117350-A1 · Apr 22, 2021 · US
Host-convertible secure enclaves in memory that leverage multi-key total memory encryption with integrity
US-2021064546-A1 · Mar 4, 2021 · US
Supporting secure memory intent
US-10922241-B2 · Feb 16, 2021 · US
Platform attestation and registration for servers
US-2021006416-A1 · Jan 7, 2021 · US
Method and apparatus to provide secure application execution
US-10885202-B2 · Jan 5, 2021 · US
Flexible provisioning of attestation keys in secure enclaves
US-10880097-B2 · Dec 29, 2020 · US
High performance interconnect
US-2020356502-A1 · Nov 12, 2020 · US
Platform attestation and registration for servers
US-10708067-B2 · Jul 7, 2020 · US
Supporting configurable security levels for memory address ranges
US-10671740-B2 · Jun 2, 2020 · US
Processors, methods, systems, and instructions to support live migration of protected containers
US-2020142838-A1 · May 7, 2020 · US
Instructions and logic to provide advanced paging capabilities for secure enclave page caches
US-10592421-B2 · Mar 17, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 97 |
| Johnson Simon P | 5 |
| Mckeen Francis X | 4 |
| Rozas Carlos V | 4 |
| Savagaonkar Uday R | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F2212/1052 | 35 |
| G06F2212/1016 | 27 |
| G06F12/1441 | 25 |
| G06F21/53 | 25 |
| G06F9/30145 | 24 |